Browsing by Author "CHANG, MC"

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A COMPUTER-AIDED SIMULATION-MODEL FOR THE IV CHARACTERISTIC OF M-N-P SILICON SCHOTTKY-BARRIER DIODES PRODUCED BY USE OF LOW-ENERGY ARSENIC-ION IMPLANTATION
(1983)
WU, CY
;
CHANG, MC
;
SHEY, AJ
;
交大名義發表
;
電子物理學系
MODELING HOT-ELECTRON GATE CURRENT IN SI MOSFETS USING A COUPLED DRIFT-DIFFUSION AND MONTE-CARLO METHOD
(1992-11-01)
HUANG, CM
;
WANG, TH
;
CHEN, CN
;
CHANG, MC
;
FU, J
A coupled two-dimensional drift-diffusion and Monte Carlo analysis is developed to study the hot-electron-caused gate leakage current in Si n-MOSFET's. The electron energy distribution in a device is evaluated directly from a Monte Carlo model at low and intermediate electron energies. In the portion of high electron energy where the distribution function cannot be resolved by the Monte Carlo method due to limited computational resources, an extrapolation technique is adopted with an assumption of a Boltzmann tail distribution. This assumption is based on the simulation result that although the distribution function at a high electric field shows a markedly non-Maxwellian feature globally, it has approximately an exponential decay in an energy region much above average electron energy. A particular averaging method is employed to extract the effective electron temperature in the extrapolation. Our result shows that the electron temperature obtained in this approach is about three times lower than that derived from average electron energy by means of [E] = 3/2 kT(e) in the high-field domain of a device. Channel hot electron injection into a gate via quantum tunneling and thermionic emission is simulated. Electron scattering in gate oxide is also taken into account. The calculated values of gate current are in good agreement with experimental results. In the simulation, the most serious hot electron injection occurs about 200-300 angstrom behind the peak of average electron energy due to a delayed heating effect.
POWER LOSSES AND OPTIMUM OPERATION CONDITIONS OF SILICON QUASI-READ DIODES
(1980)
CHANG, MC
;
CHEN, MC
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交大名義發表
;
電控工程研究所
;
National Chiao Tung University
QUASI-STATIC ANALYSIS OF X-BAND DOUBLE-DRIFT LO-HI-LO SILICON IMPATT DIODES
(1978)
CHANG, MC
;
CHEN, MC
;
交大名義發表
;
電子工程學系及電子研究所
;
National Chiao Tung University
TRANSCONDUCTANCE ENHANCEMENT DUE TO BACK BIAS FOR SUBMICRON NMOSFET
(1995-02-01)
GUO, JC
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CHANG, MC
;
LU, CY
;
HSU, CCH
;
CHUNG, SSS
For the first time, a new phenomenon of transconductance enhancement due to back bias found in submicron MOSFET's is reported. A two-dimensional numerical simulation has been performed to investigate the origin of this observation. The enhancement of the channel potential gradient is verified to be the main reason responsible for this anomalous transconductance enhancement effect. Moderate channel doping concentrations (5 x 10(16) similar to 5 x 10(17) cm(-3)), short channel lengths (submicron regime), and operation under small drain bias are three key conditions for the maximum transconductance enhancement due to the back bias to occur. A conventional linear I-V model, which employs an effective channel length defined by the source/drain metallurgical junctions and bias-independent source/drain extrinsic resistance is not able to predict such characteristics.