Browsing by Author "CHANG Edward Yi"

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Current limit circuit apparatus
(2013-09-19)
CHEN Tsung-Lin
;
CHANG Edward Yi
;
CHIENG Wei-Hua
;
CHENG Stone
;
JENG Shyr-Long
The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current.
High-side driver circuit
(2013-09-19)
CHEN Tsung-Lin
;
CHANG Edward Yi
;
CHIENG Wei-Hua
;
CHENG Stone
;
JENG Shyr-Long
The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on/off without a floating voltage source or a negative voltage source.
III-V METAL-OXIDE-SEMICONDUCTOR DEVICE
(2012-02-09)
CHANG Edward Yi
;
LIN Yueh-Chin
A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can be used to increase the capacitance of the semiconductor device.
III-V METAL-OXIDE-SEMICONDUCTOR DEVICE
(2013-06-06)
CHANG Edward Yi
;
LIN Yueh-Chin
A hafnium oxide layer, between a III-V semiconductor layer and a metal oxide layer is used to prevent interaction between the III-V semiconductor layer and the metal oxide layer.
Stacked Gate Structure, Metal-Oxide-Semiconductor Including the Same, and Method for Manufacturing the Stacked Gate Structure
(2014-06-05)
LIN Yueh-Chin
;
CHANG Edward Yi
;
CHUANG Ting-Wei
The invention provides a stacked gate structure and metal-oxide-semiconductor including the same, and method for manufacturing the stacked gate structure. The stacked gate structure comprises a substrate, a semiconductor layer positioned on the substrate, a gate dielectric positioned on the semiconductor layer, and a gate electrode layer positioned on the gate dielectric, which the gate dielectric comprises a composite oxide layer composed of lanthanum oxide (La2O3) and hafnium oxide (HfO2).