Browsing by Author "CHIOU, JC"

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COPPER CHEMICAL-VAPOR-DEPOSITION FROM CU(HEXAFLUOROACETYLACETONATE)TRIMETHYLVINYLSILANE
(1994-04-01)
CHIOU, JC
;
CHEN, YJ
;
CHEN, MC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Copper chemical vapor deposition using Cu-hexafluoroacetylacetonate (hfac) trimethylvinylsilane (TMVS) as precursor was performed in a cold-wall low pressure chemical vapor deposition (CVD) reactor. The design and operation of the reactor are described. Copper deposition on thermal SiO2, W, and CoSi2 substrate surfaces was investigated over the temperature range of 160-300-degrees-C and pressure range of 10-1000 mTorr. The activation energies of Cu CVD were determined to be 13.33 and 11.54 kcal/mole for the W and CoSi2 substrates, respectively. The dependence of film resistivity, grain size, and growth rate on deposition pressure and temperature were also investigated. The film uniformity was found to be better than ten percent over a 4-inch diameter substrate. Experimental results also show that selective deposition can be achieved at a pressure of 10 mTorr within the temperature range of 160-200-degrees-C. In addition, hydrofluoric acid dipping was found to modify the SiO2 surface and influence the copper deposition on it.
Robust control of nonlinear dynamic systems using sliding mode control and productive networks
(1995)
CHIOU, JC
;
HWANG, MC
;
WU, SD
;
電控工程研究所
;
Institute of Electrical and Control Engineering
THE PROCESSING WINDOWS FOR SELECTIVE COPPER CHEMICAL-VAPOR-DEPOSITION FROM CU(HEXAFLUOROACETYLACETONATE)TRIMETHYLVINYLSILANE
(1995-01-01)
CHIOU, JC
;
JUANG, KC
;
CHEN, MC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
To identify the processing tolerance for the selective Cu chemical vapor deposition (Cu CVD) the processing windows were constructed with respect to deposition pressure and substrate temperature over thermally grown SiO2 vs. various conducting substrates of W, CoSi2, TiN, TiW, and Al. It is found that the width of selective deposition window decreases as the deposition pressure is increased, and no selective Cu deposition can be obtained as the deposition pressure exceeds 120 mTorr. The lowest temperatures for Cu CVD on various SiO2 substrates including thermally grown, BPSG, TEOS, and PECVD SiO2 were determined so that processing windows for selective Cu deposition on Variously patterned wafers can be constructed. The selective Cu deposition was also conducted on patterned substrates with submicrometer feature sizes using the PECVD SiO, as the interlayer dielectric. The nucleation of Cu on the SiO2 surface obviously acts as the major limitation for achieving selective Cu CVD. We postulate that the Cu containing adspecies, Cu(hfac), on the insulating SiO2 surface may combine by surface diffusion, and these assembled adspecies then disproportionate by exchanging electrons with each other rather than transferring electrons through the substrate.
THERMAL-STABILITY OF CU/COSI2 CONTACTED P+N SHALLOW JUNCTION WITH AND WITHOUT TIW DIFFUSION BARRIER
(1994-10-01)
CHIOU, JC
;
CHEN, MC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The thermal stability of Cu/CoSi2 contacted p+n shallow junction diodes with and without TiW diffusion barrier was investigated with respect to metallurgical reaction and electrical characteristics. Without the diffusion barrier, the Cu (2000 angstrom)/CoSi2 (700 angstrom)/p+n diodes (with a junction depth of 0.2 mum measured from the silicide surface) were able to sustain a 30 s rapid thermal annealing (RTA) in N2 ambient up to 450-degrees-C without losing the integrity of the devices characteristics. The Cu3Si phase was observed at the CoSi2/Si interface after 500-degrees-C annealing; the phase penetrated through the CoSi2 layer causing a catastrophic change in layer structure after 700-degrees-C annealing. With the addition of a 1200 angstrom thickness of TiW diffusion barrier between Cu and CoSi2, the junction diodes were able to sustain the RTA treatment up to 775-degrees-C without degrading the basic electrical characteristics, and no metallurgical reaction could be observed even after an 800-degrees-C annealing.
TIW(N) AS DIFFUSION-BARRIERS BETWEEN CU AND SI
(1995-07-01)
CHIOU, JC
;
JUANG, KC
;
CHEN, MC
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
TiW(N) and aw are employed as diffusion barriers in the Cu/barrier/Si system. The thermal stability of Cu/TiW(N) and Cu/TiW contacted p(+)n junction diodes was investigated with respect to metallurgical reaction and electrical characteristics. The as-deposited TiW film formed body-centered cubic (bcc) structure, while the TiW(N) film formed face-centered cubic (fcc) structure. The Cu/TiW(600 Angstrom)/Si structure remains intact up to 750 degrees C 30 s rapid thermal anneal (RTA) in N-2 ambient; at 775 degrees C the Cu diffuses through the TiW layer to form Cu,Si with an overlayer of Ti-W-Si on the surface. The Cu/TiW(N)(600 Angstrom)/Si system is metallurgically stable up to 1000 degrees C 30 s RTA in N-2 ambient. The Cu/TiW(600 Angstrom)/p(+)n junction diodes were able to withstand the RTA annealing up to 675 degrees C without losing the device integrity; however, the devices' characteristics are completely destroy at temperatures above 775 degrees C inconsistent with the occurrence of dramatic metallurgical reaction. The Cu/TiW(N)(600 Angstrom)/p(+)n junction diodes were able to withstand the RTA treatment up to 650 degrees C without electrical characteristic degradation; and the devices' characteristics degrade gradually with the increase of RTA temperature.