Browsing by Author "CHOU, PF"

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A COMPREHENSIVE STUDY OF SUPPRESSION OF BORON PENETRATION BY AMORPHOUS-SI GATE IN P+-GATE PMOS DEVICES
(1995-12-01)
LIN, CY
;
JUAN, KC
;
CHANG, CY
;
PAN, FM
;
CHOU, PF
This paper presents a comprehensive study of the impact of the silicon gate structure on the suppression of boron penetration in p(+)-gate devices, The characteristics and reliability for different gate structures (poly-Si, alpha-Si, poly-Si/poly-Si, poly-Si/alpha-Si, alpha-Si/poly-Si, and alpha-Si/alpha-Si) in p(+) polygate PMOS devices are investigated in detail, The suppression of boron penetration by the nitrided gate oxide is also discussed, The comparison is based on flatband voltage shift as well as the value of charge to breakdown. Results show that the effect of boron diffusion through the thin gate oxide in p(+) polygate PMOS devices can be significantly suppressed by employing the as-deposited amorphous silicon gate, Stacked structures can also be employed to suppress boron penetration at the expense of higher polygate resistance, The single layer as-deposited amorphous silicon is a suitable silicon gate material in the p(+)-gate PMOS device for future dual-gate CMOS process, In addition, by employing a long time annealing at 600 degrees C prior to p(+)-gate ion implantation and activation, further improvements in suppression of boron penetration, polygate resistance, and gate oxide reliability can be achieved for the as-deposited amorphous-Si gate, Modifying the silicon gate structure instead of the gate dielectrics is an effective approach to suppress the boron penetration effect.
EFFECT OF OXYGEN IMPURITY ON MICROSTRUCTURE AND BORON PENETRATION IN A BF2+ IMPLANTED LPCVD STACKED AMORPHOUS-SILICON P(+) GATED PMOS CAPACITOR
(1995-07-01)
LIN, CY
;
PAN, FM
;
CHOU, PF
;
CHANG, CY
;
電控工程研究所
Secondary ion mass spectroscopy (SIMS) and transmission electron microscopy have been used to characterize microstructure and boron penetration in BF2+ implanted amorphous silicon p(+) gated metal oxide semiconductor (PMOS) capacitors, in which oxygen is inadvertently introduced in the gate area during the low pressure chemical vapor deposition (LPCVD) process. Oxygen impurity is found to be incorporated in the LPCVD deposited amorphous silicon film by SIMS. During the break between the two successive depositions for the stacked amorphous silicon (SAS) gate, an ultrathin oxide layer is formed at the interface between the two LPCVD amorphous silicon layers. The two thinner layers lead to smaller grains in the SAS structure. The interfacial oxide layer is a diffusion barrier for oxygen, which causes a higher oxygen concentration and, in turn, retards the crystallization in the SAS structure. Both the interfacial oxide layer and the gate oxide can dissolve a significant amount of fluorine after annealihg. Reduction of free fluorine near or in the gate oxide due to fluorine dissolution in the interfacial oxide layer plays a crucial role for suppressing the boron penetration in the SAS capacitor.
EFFECTS OF COBALT SILICIDATION ON THE ELECTRICAL CHARACTERISTICS OF SHALLOW P(+)N JUNCTIONS FORMED BY BF2+ IMPLANTATION INTO THIN POLYCRYSTALLINE SI FILMS
(1995-03-01)
LIN, CT
;
CHAO, CH
;
JUANG, MH
;
JAN, ST
;
CHOU, PF
Excellent shallow p(+)n junctions have been formed by implanting BF2+ ions into thin polycrystalline Si films and subsequent annealing. The samples implanted at 50 keV to a dose 5 x 10(15) cm(-2) show a leakage of 1 nA/cm(2) and a junction depth of about 0.05 mu m after a 800 degrees C annealing. To reduce the series resistances of the junctions, silicidation with different col;alt thickness was used to drive the as-implanted dopants in the polysilicon films into the resultant junctions of the silicon substrates. For the low energy implantation at 50 keV at all dosages, silicidation can result in poor electrical characteristics due to the confinement of the dopants by the silicidation process. On the other hand, the electrical characteristics can be retained when a higher implantation energy of 100 keV with a dosage higher than 5 x 10(15) cm 2 was used. In addition, the samples implanted at 125 keV show poor electrical characteristics for the nonsilicided junctions but good characteristics after the silicidation. It is attributed to the enhanced defect annihilation by the formed silicide. Furthermore, silicided implanted through poly-Si junctions with excellent characteristics can be fabricated after a low temperature (600 degrees C) annealing if the samples are implanted at 100 keV with a dosage higher than 5 X 10(15) cm(-2).
FORMATION OF SHALLOW P(+)N JUNCTIONS BY BF2+ IMPLANTATION INTO THIN POLYCRYSTALLINE SI FILMS
(1994-09-15)
LIN, CT
;
JUANG, MH
;
JAN, ST
;
CHOU, PF
;
CHENG, HC
Excellent shallow p(+)n junctions have been formed by implanting BF2+ ions into thin polycrystalline Si films and subsequent annealing. The samples implanted with 5X10(15) cm(-2) at 50 keV show a leakage of 1 nA/cm(2) and a junction depth of about 0.05 mu m after a 800 degrees C annealing. Various implant and annealing cases were examined to determine and characterize their effects on the resultant junctions. High energy implantations (125 and 150 keV) exhibit poor characteristics at all annealing temperatures because the Si substrates are severely damaged. However, the specimens implanted below 100 keV result in excellent diode characteristics for all implantation doses after an 800 degrees C annealing since the implantation defects are confined in the poly-Si layer. The major factors affecting the junction depth were found to be the implantation energy and annealing temperature, while a minor for the implantation dosage. Furthermore, the effects of the subsequent silicidation on the resultant junction characteristics were also investigated.
LOW-TEMPERATURE FORMATION OF PALLADIUM SILICIDED SHALLOW P(+)N JUNCTIONS USING IMPLANT THROUGH METAL TECHNOLOGY
(1994-06-01)
LIN, CT
;
CHOU, PF
;
CHENG, HC
;
奈米中心
;
Nano Facility Center
Excellent silicided shallow pin junctions have been successfully achieved by the implantation of BF: ions into thin Pd films on a Si substrate to a dose of 5 x 10(15) cm(-2) and subsequent low-temperature (as low as 500 degrees C) furnace annealing. The formed junctions have been characterized for the respective implantation conditions. In this experiment, the implant energy plays the key role in obtaining a low leakage diode. Reverse current density of about 1 nA/cm(2) and the ideality factor of about 1.03 can be attained by the implantation of BF2+ ions at 100 keV and subsequent annealing at 600 degrees C. The junction depth is about 0.08 mu m, measured by the spread resistance method. As compared with the results of unimplanted specimens, the implantation of BF2+ ions into a thin Pd layer can stabilize the Pd silicide film and prevent it from forming islands during high-temperature annealing. High-temperature stability of palladium silicides and the leakage current mechanism are also discussed in this report.
LOW-TEMPERATURE FORMATION OF SHALLOW P(+)N JUNCTIONS BY BF2+ IMPLANTATION INTO THIN PD2SI FILMS ON SI SUBSTRATES
(1995-05-01)
LIN, CT
;
MA, KP
;
CHOU, PF
;
CHENG, HC
;
奈米中心
Excellent silicided shallow p(+)n junctions have been successfully achieved by the implantation of BF2+ ions into thin Pd2Si films on Si substrates to a dose of 5 x 10(15) cm(-2) and subsequent low temperature (even at 550 degrees C) furnace annealing. The formed junctions have been characterized for respective implantation conditions. In this experiment, the implant energy is the key role in obtaining a low leakage diode. Reverse current density of about 3 nA/cm(2) and an ideality factor of about 1.05 can be attained by the implantation of BF2+ ions at 80 keV and subsequent annealing at 550 degrees C. The junction depth is about 0.09 mu m, measured by the spread resistance method. As compared with the results of unimplanted specimens, the implantation of BF2+ ions into a thin Pd2Si layer can stabilize the silicide film and prevent it from forming islands during high temperature annealing.