Browsing by Author "Chan, Leng"

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Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device Fluctuations
(2008-11-01)
Hsu, Hsing-Hui
;
Liu, Ta-Wei
;
Chan, Leng
;
Lin, Chuan-Ding
;
Huang, Tiao-Yuan
Several types of poly-Si nanowire (NW) thin-film transistors (TFTs) with multiple-gated (MG) configuration were demonstrated and characterized. These devices were fabricated with simple methods without resorting to costly lithographic tools and processes. The fabricated trigated devices show a low subthreshold swing (SS) of around 100 mV/dec and on/off current ratio higher than 10(8). These results clearly indicate the effectiveness of MG scheme in enhancing the device performance. Furthermore, a multiple-channel scheme was demonstrated to further increase the drive current without compromising device performance. Finally, the impact of MG on the variation of NWTFT characteristics is investigated with a clever method that allows the fabrication of test structures with identical NW channel but different gate configurations. The results,clearly show that the variation could be reduced by increasing the portion of NW channel surface that is modulated by the gate.
Threshold-Voltage Fluctuation of Double-Gated Poly-Si Nanowire Field-Effect Transistor
(2009-03-01)
Hsu, Hsing-Hui
;
Lin, Horng-Chih
;
Chan, Leng
;
Huang, Tiao-Yuan
;
電子工程學系及電子研究所
In this letter, the fluctuation characteristics of polycrystalline silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) with independently controlled double-gate configuration were studied. The defects existing in the NW channels are identified as one of the major sources for the fluctuation. The passivation of these defects by plasma treatment is shown to be effective for reducing the fluctuation. We have also found that the fluctuation is closely related to the operation modes. When only one of the gates is employed as the driving gate to control the switching behavior of the device, an optimum bias for the other gate can be found for minimizing the fluctuation.