Browsing by Author "Chang, Chia-Ning"
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Item type:Item, Concept Extraction and Clustering for Search Result Organization and Virtual Community Construction(2012-01-01) ;Chen, Shihn-Yuarn ;Chang, Chia-Ning ;Nien, Yi-Hsiang ;Ke, Hao-Ren資訊管理與財務金融系 註:原資管所+財金所This study proposes a concept extraction and clustering method, which improves Topic Keyword Clustering by using Log Likelihood Ratio for semantic correlation and Bisection K-Means for document clustering. Two value-added services are proposed to show how this approach can benefit information retrieval (IR) systems. The first service focuses on the organization and visual presentation of search results by clustering and bibliographic coupling. The second one aims at constructing virtual research communities and recommending significant papers to researchers. In addition to the two services, this study conducts quantitative and qualitative evaluations to show the feasibility of the proposed method; moreover, comparison with the previous approach is also performed. The experimental results show that the accuracy of the proposed method for search result organization reaches 80%, outperforming Topic Keyword Clustering. Both the precision and recall of virtual community construction are higher than 70%, and the accuracy of paper recommendation is almost 90%.Item type:Item, Exploration and Evaluation of Low-Dropout Linear Voltage Regulator with FinFET, TFET and Hybrid TFET-FinFET Implementations.(2017-01-01) ;Chang, Chia-Ning ;Chen, Yin-Nien ;Huang, Po-Tsang ;Su, PinChuang, Ching-TeThis paper investigates and evaluates analog and digital low-dropout linear voltage regulators (LDO) with FinFET, TFET and hybrid TFET-FinFET implementations. We utilize Sentaurus physics-based atomistic 3D TCAD mixed-mode simulations for device characteristics and HSPICE with look-up tables based on Verilog-A models calibrated with TCAD simulation results. Frequency response, load regulation and power supply rejection ratio (PSRR) are evaluated for analog LDOs under low, medium and high bias-current conditions. The results indicate that for analog implementations, TFET-LDO and hybrid-LDO provide better loop-gain and PSRR than FinFET-LDO under low and medium operating currents, whereas at higher operating current, FinFET implementation would outperform. As operating voltage is reduced, the performances of analog implementations degrade, and digital implementations become favorable for VIN below around 0.55V. We further show that for digital LDO, all FinFET implementation provides superior performance over all TFET and hybrid TFET-FinFET implementations.