Browsing by Author "Chang, EY"

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2 V-operated InGaP-AlGaAs-InGaAs enhancement-mode pseudomorphic HEMT
(2005-02-01)
Chu, LH
;
Chang, EY
;
Chen, SH
;
Lien, YC
;
Chang, CY
A low-voltage single power supply enhancement-mode InGaP-AlGaAs-InGaAs pseudomorphic high-electron mobility transistor (PHEMT) is reported for the first time. The fabricated 0.5 x 160 mum(2) device shows low knee voltage of 0.3 V, drain-source current (I-DS) of 375 mA/mm and maximum transconductance of 550 mS/mm when drain-source voltage (V-DS) was 2.5 V. High-frequency performance was also achieved; the cut-off frequency(F-t) is 60 GHz and maximum oscillation frequency(F-max) is 128 GHz. The noise figure of the 160-mum gate width device at 17 GHz was measured to be 1.02 dB with 10.12 dB associated gain. The E-mode InGaP-AlGaAs-InGaAs PHEMT, exhibits a high output power density of 453 mW/mm with a high linear gain of 30.5 dB at 2.4 GHz. The E-mode PHEMT can also achieve a high maximum power added efficiency (PAE) of 70%, when tuned for maximum PAE.
2-V-operation delta-doped power HEMT's for personal handy-phone systems
(1997-08-01)
Lai, YL
;
Chang, EY
;
Chang, CY
;
Liu, TH
;
Wang, SP
A high-efficiency and high-power-density delta-doped AIGaAs/InGaAs HEMT with low adjacent channel leakage has been developed for the digital wireless personal handy-phone system (PHS). When qualified by 1.9-GHz pi/4-shifted quadrature phase shift keying (QPSK) modulated PHS standard signals, the 2.0-V-operation HEMT with a 1-mm gate width demonstrated a power-added efficiency of 45.3% and an output power density of 105 mW/mm. This is the highest power density ever reported by the power transistors for the PHS. The state-of-the-art results for the PHS operating at 2.0 V were achieved by the delta-doped power HEMT for the first time.
2-V-operation delta-doped power HEMT's for personal handy-phone systems
(1997-08-01)
Lai, YL
;
Chang, EY
;
Chang, CY
;
Liu, TH
;
Wang, SP
A high-efficiency and high-power-density delta-doped AIGaAs/InGaAs HEMT with low adjacent channel leakage has been developed for the digital wireless personal handy-phone system (PHS). When qualified by 1.9-GHz pi/4-shifted quadrature phase shift keying (QPSK) modulated PHS standard signals, the 2.0-V-operation HEMT with a 1-mm gate width demonstrated a power-added efficiency of 45.3% and an output power density of 105 mW/mm. This is the highest power density ever reported by the power transistors for the PHS. The state-of-the-art results for the PHS operating at 2.0 V were achieved by the delta-doped power HEMT for the first time.
2.4 V-operated enhancement mode PHEMT with 32 dBm output power and 61 % power efficenciecy
(2001)
Chen, SH
;
Chang, EY
;
Lin, YC
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A 2.4 V operated enhancement-mode pseudormorphic high electron mobility transistors (E-PHEMTs) with high output power and power-added-efficiency (PAE) have been developed. With optimally designed epitaxial structure and gate recess process, the E-PHEMT shows high power performance and high power gain. Under 2.4 V bias at 1.9 GHz, the E-PHEMT shows maximum output power of 32.25 dBm and maximum power-added efficiency of 61.45% with linear power gain of 13.93 dB when the device was tuned for maximum output power match. When tuned for maximum output power added efficiency, the E-PHEMT can achieve a maximum PAE of 78.51%. The developed E-PHEMT with superior power performance is one of the candidates for power amplifiers used for 2.4 V-operated 3G wireless communication system.
2.4 V-operated enhancement-mode power PHEMTs for personal handy-phone system application
(2001)
Chen, SH
;
Chang, EY
;
Lin, YC
;
Lee, CS
;
友訊交大聯合研發中心
Enhacement-mode pseudomorphic high electron mobility transistors (E-PHEMTs) were developed for low voltage wireless communication applications. Under drain bias of 3.6 V, the device delivered a high output power density of 265.25 mW/mm (29.5dBm) with a power-added-efficiency (PAE) of 50.54 %. Under 1.9GHz pi/4-shifted quadrature phase shift keying(QPSK) modulation signal, the 3.36 mm devices meet personal handy-phone system (PHS) specification at an output power level of 22.42 dB with PAE of 35.12% under 2.4 V drain bias. The E-PHEMTs developed are adequate for low-voltage-operated PHS application.
5 mm high-power-density dual-delta-doped power HEMT's for 3 V L-band applications
(1996-05-01)
Lai, YL
;
Chang, EY
;
Chang, CY
;
Chen, TK
;
Liu, TH
A high-power-density dual-delta-doped AlGaAs/InGaAs/GaAs high electron mobility transistor (HEMT) for personal communication applications has been developed. A 5.0 mm gate-width device operating at a drain bias of 3.0 V gave an output power over 1 W, The 1 mu m gate-length HEMT exhibited a current density of 425 mA/mm at V-gs = 0.5 V, The maximum transconductance of the device was 270 mS/mm, The effective knee voltage was as low as 0.3 V, At the class AB operation, the HEMT demonstrated an output power density of 200 mW/mm, 64% power-added efficiency and 18.2 dB linear gain at 900 MHz, This is the highest power density of a dual-delta-doped AlGaAs/InGaAs/GaAs HEMT reported to date for low voltage (3 V) wireless applications.
5 mm high-power-density dual-delta-doped power HEMT's for 3 V L-band applications
(1996-05-01)
Lai, YL
;
Chang, EY
;
Chang, CY
;
Chen, TK
;
Liu, TH
A high-power-density dual-delta-doped AlGaAs/InGaAs/GaAs high electron mobility transistor (HEMT) for personal communication applications has been developed. A 5.0 mm gate-width device operating at a drain bias of 3.0 V gave an output power over 1 W, The 1 mu m gate-length HEMT exhibited a current density of 425 mA/mm at V-gs = 0.5 V, The maximum transconductance of the device was 270 mS/mm, The effective knee voltage was as low as 0.3 V, At the class AB operation, the HEMT demonstrated an output power density of 200 mW/mm, 64% power-added efficiency and 18.2 dB linear gain at 900 MHz, This is the highest power density of a dual-delta-doped AlGaAs/InGaAs/GaAs HEMT reported to date for low voltage (3 V) wireless applications.
A 1.2-V operation power pseudomorphic high electron mobility transistor for personal handy phone handset application
(2000-10-15)
Chang, EY
;
Lee, DH
;
Chen, SH
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A 1.2 V GaAs power pseudomorphic high electron mobility transistors (PHEMT's) for personal handy phone system (PHS) handset application was developed. The power PHEMT has a dual delta doped AlGaAs/InGaAs/GaAs based structure with compact device layout. The 6.72 mm device exhibits maximum power added efficiency (PAE) of 43.62% at 1.2V drain bias with an output power of 22.18 dBm. Under 1.9 GHz pi /4-shifted quadrature phase shift keying (QPSK) modulated PHS signal, the device shows an adjacent channel leakage power (P-adj) Of -56.86 dBc at 600 kHz apart from the center frequency and a linear efficiency of 41.31%. This is the first report on the 1.2-V operation power PHEMT for PHS handset application so far.
A GaAs/AlAs wet selective etch process for the gate recess of GaAs power metal-semiconductor field-effect transistors
(2001-01-01)
Chang, EY
;
Lai, YL
;
Lee, YS
;
Chen, SH
;
材料科學與工程學系
A highly selective wet chemical etch process for gate recess of the GaAs power metal-semiconductor field effect transistors (MES FETs) was developed. The power MESFETs used in this study were epitaxially grown devices with a 20 Angstrom A1As etch-stop layer for gate recess. The selective etch process using citric acid/potassium citrate/hydrogen peroxide solution was studied. A selectivity better than 3800:1 was achieved for GaAs/A1As layers. This selective etch was applied both to high-power, high-voltage power MESFETs and low-voltage large-periphery power MESFETs. For high-power applications, the 14.7 mm device had a breakdown voltage of 22 V. When tested at 1.88 GHz with a drain bias of 10 V, it provided a maximum output power of 38.8 dBm and a maximum power-added efficiency of 52.5%. For low-voltage applications, the 19.8 mm device was tested under IS-95 code-division multiple access (CDMA) modulation at 1.88 GHz with a drain bias of 3.5 V. Under CDMA modulation, the device showed an output power of 28.03 dBm with an adjacent channel power rejection of -29.6 dBc at 1.25 MHz offset frequency. Both devices also showed excellent uniformity in pinch-off voltages. (C) 2000 The Electrochemical Society. S0013-4651 (00)03-053-6. All rights reserved.
A GeSi-buffer structure for growth of high-quality GaAs epitaxial layers on a Si substrate
(2005-01-01)
Chang, EY
;
Yang, TH
;
Luo, GL
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Chang, CY
;
材料科學與工程學系
A SiGe-buffer structure for growth of high-quality GaAs layers on a Si (100) substrate is proposed. For the growth of this SiGe-buffer structure. a 0.8-mum Si-0.1 Ge-0.9 layer was first grown. Because of the large mismatch between this layer and the Si substrate, many dislocations formed near the interface and in the low part of the Si0.1Ge0.9 layer. A 0.8-mum Si0.05Ge0.95 layer and a 1-mum top Ge layer were subsequently grown. The strained Si0.05Ge0.95/Si0.1Ge0.9 and Ge/Si0.05Ge0.95 interfaces formed can bend and terminate the upward-propagated dislocations very effectively. An in-situ annealing process is also performed for each individual layer. Finally, a 1-3-mum GaAs film was grown by metal-organic chemical vapor deposition (MOCVD) at 600degreesC. The experimental results show that the dislocation density in the top Ge and GaAs layers can be greatly reduced, and the surface was kept very smooth after growth, while the total thickness of the structure was only 5.1 mum (2.6-mum SiGe-buffer structure + 29.5-mum GaAs layer).
A gold-free fully copper-metallized InP heterojunction bipolar transistor using non-alloyed ohmic contact and platinum diffusion barrier
(2005)
Chang, SW
;
Chang, EY
;
Lee, CS
;
Chen, KS
;
Tseng, CW
A gold-free, fully Cu-metallized InP heterojunction bipolar transistor using non-alloyed Ti/Pt/Cu and Pt/Ti/Pt/Cu ohmic contacts and platinum diffusion barrier has been successfully fabricated. The InGaAs/Ti/Pt/Cu ohmic structure was stable after annealing up to 350 degrees C as judged from the Auger depth profiles. A current-accelerated stress test was conducted on the device with a current density J(C) = 80kA/cm(2) for 24h, and the current gain showed no degradation after the current stress. The devices were also thermally annealed at 200 degrees C for 3 h and showed almost no change in the electrical parameters after the heat treatment. The results show that the Au-free, fully Cu-metallized InP heterojunction bipolar transistor (HBT) can be realized using non-alloyed ohmic contacts and Pt diffusion barrier.
A high power enhancement-mode pseudomorphic high electron mobility transistor with 2.5 W output power and 64.5 % efficiency at 3 V
(2002)
Chen, SH
;
Chang, EY
;
Lin, YC
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A 3-V operated enhancement-mode pseudomorphic high electron mobility transistor (E-PHEMT) with high output power and high efficiency has been developed. The E-PHEMT has total gate width of 20 mm and gate length. of 0.5 mum. When the power performance was evaluated at 1.9 GHz, the E-PHEMT shows a saturation output power of 34.1 dBm (2.57 W) with power-added efficiency (PAE) of 64.5 % and power gain of 10.2 dB at 3 V bias. The linear gain under this testing condition is 14.9 dB. The E-PHEMTs developed have excellent power performance and are suitable for power amplifier application for cellular handsets.
A low noise composite-channel metamorphic HEMT for wireless communication applications
(2003)
Lu, CY
;
Chen, KS
;
Lee, HM
;
Chang, EY
;
Chen, SH
A composite-channel Metamorphic high electron mobility transistor (MHEMT) was developed for low noise high linearity application. The MHEMT was grown by Molecular Beam Epitaxy (MBE) on GaAs substrates with InAlAs graded buffer. The composite-channel layers in the MHEMT include a top In0.55Ga0.45As layer, a middle In0.67Ga0.33As layer, and a bottom In0.55Ga0.45As layer. The design of this structure provides better electron confinement in the channel with less impact ionization as compared to conventional dual delta doped MHEMTs. This results in devices with higher linearity and drain to gate voltage as compared to the conventional metamorphic HEMTs. The 0.25x160 mum(2) device with the novel channel structure exhibits a maximum frequency of oscillation f(max) of 290 GHz and a current gain cut-off frequency f(t) of 110 GHz. The noise figure of the device at 6 GHz is 0.23 dB and the associated gain was 15.06 dB. The IP3 of the device at 6 GHz is 19.67 dBm. The composite channel metamorphic HEMT shows great potential for high linearity and low noise application at high frequencies.
A metamorphic high electron-mobitity transistor with reflowed submicron T-Gate for high-speed optoelectronics applications
(2003)
Lien, YC
;
Chang, EY
;
Chu, LX
;
Chang, HC
;
Lee, CS
A metamorphic high electron-mobility transistor (HEMT) manufactured with reflowed submicron T-gate using E-beam lithography for high-speed optoelectronics applications is developed. The In0.53Al0.47As/InGaAs HEMT uses InxAl1-xAs as the buffer layer between GaAs substrate and the InP lattice-matched HEMT structure. The T-gate developed has a gate length of 0.1 mum. The fabricated metamorphic HEMT has a saturation drain current of 280mA/mrn and a transconductance of 840mS/mm at V-DS=1.2V Noise figure for 160 mum gate-width device is less than 1 dB and the associated gain is up to 14dB at 18GHz. The device demonstrates a cut-off frequency f(T) of 150GHz and a maximum frequency f(MAX) up to 350GHz. The metamorphic HEMT developed has the potential for high-speed optoelectronics applications.
A novel fabrication technique of T-shaped gates using an EGMEA and PMIPK multilayer resist system and a single-step electron-beam exposure
(1998-03-01)
Lai, YL
;
Lai, YK
;
Chang, CY
;
Chang, EY
;
材料科學與工程學系
A novel fabrication process of submicron T-shaped gates using an EGMEA and PMIPK multi-layer resist system and e-beam lithography has been developed. Due to the different sensitivities of the EGMEA and PMIPK resists, narrow/wide/narrow resist opening was obtained. The status of the electron scattering and the incident primary electron beams statistically construct the absorbed energy density distribution contours. The absorbed energy density distribution contours in association with the sensitivity feature of the resists and the appropriate development conditions determine the final resist profile. Only a single exposure step and a single development step are required. The simplified fabrication process of T-shaped gates significantly reduces not only the process time but also the production costs. The simple submicron T-shaped gate fabrication process studied provides a suitable technique for the mass manufacture of the advanced InP-based and GaAs-based microwave devices and circuits.
A novel I-line phase shift mask (PSM) technique for submicron T-Gate formation
(2001)
Fu, DK
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Chang, HC
;
Fang, CY
;
Lee, CS
;
Chang, EY
Submicron T-gate formation using I-line stepper with phase shift mask (PSM) technique [1,2,3] has become very attractive for GaAs MMIC technology due to its low capital investment and high throughput. In this paper a novel submicron (<0.2mum) T-gate technology using phase shift mask technique is reported. The 8% half-tone PSM was selected for the definition of the isolated narrow space. Before lithography, 2500Angstrom SiN film was deposited on the wafer. After I-line PSM exposure and RIE etch of the silicon nitride film, openings with less than 0.25mum wide were formed on the SiN film. To further reduce the dimension of the openings, the wafer was then deposited addition 500Angstrom nitride and etched back using RIE without any mask. Less than 0.2mum openings were formed on the wafer after the dry etch. The wafer was then coated with another layer of photoresist to form lift-off structure. Gate length of 0.185mum was obtained using this technique. This novel process is a high throughput T-gate process compared to conventional E-beam lithography technology for GaAs MMIC production.
A simple fabrication process of T-shaped gates using a deep-UV/electron-beam/deep-UV tri-layer resist system and electron-beam lithography
(1996-12-01)
Lai, YL
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Chang, EY
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Chang, CY
;
Yang, HPD
;
Nakamura, K
A new fabrication process of T-shaped gates has been developed using a deep-UV/electron-beam/deep-UV (DUV/EB/DUV) tri-layer resist system and electron-beam lithography for the first time. The simple process accomplished a submicron T-shaped gate by a single exposure and a single development step. The narrow/wide/narrow opening of the DUV/EB/DUV resist structure can be accurately controlled by the e-beam dosage and the development conditions. Differences in the sensitivities of the DUV resist and the EB resist were investigated. Due to the lower sensitivity of the adopted DUV resist to the electron beam, the smaller opening of the DUV resist layer was obtained. The higher sensitivity of the EB resist resulted in a wider opening in the middle resist layer. A 0.15-mu m-gate-length T-shaped gate can be easily formed by the short-process-time and low-production-cost hybrid DUV/EB/DUV resist approach.
A study of boron diffusion from selectively grown epitaxial silicon-germanium into silicon during rapid thermal annealing
(2002)
Yang, TH
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Chang, EY
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Chen, KM
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Chien, CH
;
Huang, HJ
Boron diffusion from selectively grown epitaxial Si1-xGex into Si during rapid thermal annealing (RTA) was investigated. Selective epitaxial growth (SEG) of in-situ boron-doped strained Si1-xGex epitaxial layers with different Ge percentages were selectively grown by ultra high vacuum chemical molecular epitaxy (UHVCME). The results show that the boron diffusion depth from SEG Si1-xGex into n-type Si depends on boron concentration, Ge profile in the SEG area, and the size of the SEG area. Higher boron concentrations in SEG Si1-xGex film increases the boron diffusion depth. However, the diffusion depth can be reduced by increasing Ge composition in SEG Si1-xGex. It was also found that the samples with graded Ge profiles have higher diffusion depths than those with uniform profiles. In addition, the boron diffusion depth increases with the size of the SEG Si1-xGex area. The strain in SEG Si1-xGex, the chemical potential of Ge in SEG Si1-xGex and the dislocations induced in the SEG Si1-xGex layers are the main reasons for the phenomena observed.
A study of subbands in AlGaN/GaN high-electron-mobility transistor structures using low-temperature photoluminescence spectroscopy
(2002-06-17)
Fang, CY
;
Lin, CF
;
Chang, EY
;
Feng, MS
;
材料科學與工程學系
Al0.15Ga0.85N/GaN high-electron-mobility transistor (HEMT) structures with various delta-doping concentrations and spacer thicknesses grown on sapphire by metalorganic chemical-vapor deposition are investigated. The Hall mobility is as high as 1333 cm(2)/V s at room temperature and 6330 cm(2)/V s at 77 K. Two-dimensional electron gas (2DEG) phenomena, which have not been clearly resolved in the literature, are observed by photoluminescence (PL) spectra at low temperature in this study. The PL spectra peaks of the interband transitions from 2DEG subbands to the valence band are in the range from 3.486 to 3.312 eV. The effects of the strain caused by different Al fractions of the top layer, and that of the spacer thickness on the 2DEG phenomena are discussed. Redshifts due to temperature variations for various HEMT structures are observed in 2DEG subbands and in the band-edge emission, which is believed to be evidence of interband transitions from 2DEG subbands to valence bands. (C) 2002 American Institute of Physics.
A study of the fabrication of flip-chip bumps using dry-film
(2004)
Ke, ZT
;
Lee, CS
;
Shen, KH
;
Chang, EY
;
材料科學與工程學系
This work is to study the dry-film photoresist to form patterns for Flip-Chip bumps on 300 mm wafers. The so-called "double-deck metal seed layer" process was also applied in this study by using sputtered 1000 Angstrom Ti (Titanium) and 5000 Angstrom Cu (Copper) metal layers. By welding the metal and solder electroplating technology on the chip of the integrated circuits, Cu / Ni / Solder alloy fill zip hole under bumps metallization after solder re-flowing at 220degreesC. This research optimizes the parameters of the dry-film photoresist, lithography technology, metal sputtering technology and metal electroplating technology.