Browsing by Author "Chang, Hsiao-Chun"

Now showing 1 - 7 of 7

An Advanced 2.5-D Heterogeneous Integration Packaging for High-Density Neural Sensing Microsystem
(2017-04-01)
Hu, Yu-Chen
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Huang, Yu-Chieh
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Huang, Po-Tsang
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Wu, Shang-Lin
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Chang, Hsiao-Chun
In the traditional neural sensing microstructure, the limited metal line pitch and the metal layer numbers restrict the neural signal routing ability from electrodes to circuit chips. Miniature packaging and excessive noise interference bottlenecks are some of the challenges faced by the electrodes and circuit chips integration with traditional wire bonding. This paper proposes a 2.5-D heterogeneous integration neural sensing microsystem based on the silicon substrate to overcome these issues. With standard semiconductor and 3-D integration processes, high-channel-density (256 channels at 25 mm(2)) neural sensing microsystem is achieved. Through silicon via provides the shortest vertical interconnection and dramatically minimizes the packaging. Furthermore, the interposer can carry multiple chips to enhance the function of the biosensor. Electrical characteristics and reliability examinations reveal its high quality and great performance as compared to traditional approaches. This novel highly integrated neural sensing microsystem is expected to contribute to the biomedical field for exploring and solving unknown biological mysteries.
An Advanced 3D/2.5D Integration Packaging Approach Using Double-Self-Assembly Method with Complex Topography, and Micropin-Fin Heat Sink Interposer for Pressure Sensing System
(2016-01-01)
Hu, Yu-Chen
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Lin, Chun-Pin
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Chang, Hsiao-Chun
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Yang, Yu-Tao
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Chen, Chi-Shi
To cater complex topography sensors and circuit chips for smart lifestyle applications using Internet of Things (IoT), we develop a novel efficient double-self-assembly packaging approach by 3D/2.5D heterogeneous integration. This technology is able to integrate various kinds of processed chips, especially with uneven surface and bottom topography. With liquid surface tension, complex topography chips can be handled and self-aligned on precise locations. Double-self-assembly approach demonstrates temporary bonding on carrier wafer and self-aligned permanent bonding in a pressure sensing system packaging. The optimized volume of liquid to use on various complex topography shapes and areas are investigated, while Cu/In low temperature metal bonding and self-assembly approach for high I/O density and low bonding resistance are demonstrated. Excellent electrical characteristics and mechanical strength of show the feasibility of the double-self-assembly approach on complex topography surface chips packaging applications.
An Ultra-High-Density 256-channel/25mm(2) Neural Sensing Microsystem using TSV-embedded Neural Probes
(2016)
Huang, Yu-Chieh
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Huang, Po-Tsang
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Wu, Shang-Lin
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Hui, Yu-Chen
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You, Yan-Huei
Highly integrated neural sensing microsystems are crucial to capture accurate signals for brain function investigations. In this paper, a 256-channel/25 mm(2) neural sensing microsystem is presented based on through-silicon-via (TSV) 2.5D integration. This microsystem composes of dissolvable mu-needles, TSV-embedded mu-probes, 256-channel neural amplifiers, 11-bit area-power-efficient SAR ADCs and serializers. Based on the dissolvable mu-needles and TSV 2.5D integration, this microsystem can detect 256 ECoG/LFP signals within the small area of 5mm x 5mm. Additionally, the neural amplifier realizes 57.8dB gain with only 9.8 mu W for each channel, and the 9.7-bit ENOB of the SAR ADC at 32kS/s can be achieved with 0.42 mu W and 0.036 mm(2). The overall power of this microsystem is only 3.79mW for 256-channel neural sensing.
Integration of Neural Sensing Microsystem with TSV-embedded Dissolvable mu-Needles Array, Biocompatible Flexible Interposer, and Neural Recording Circuits
(2016)
Huang, Yu-Chieh
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Hu, Yu-Chen
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Huang, Po-Tsang
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Wu, Shang-Lin
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You, Yan-Huei
Local brain connectivity is expected to lead to new models for neurological diseases, which may in turn result in advanced understanding and better treatment. This paper presents a neural sensing microsystem integrated with TSV-embedded dissolvable mu-needles array, ENIG bonding technology, biocompatible Au-TSV flexible interposer and neural recording circuits, for neural sensing implantation. An ultra-thin film bonding approach is proposed for integration of interposer assembly. Removing bonding wire by proposed bonding technology, the dimension of neural sensing system can be minimized to reduce surgical area and promote implant success rate. The signal quality of neural recording can be significantly improved by eliminating complex signal paths with 2.5D TSV integration from neural sensing interface to neural recording circuits.
Study of Self-Assembly Technology for 3D Integration Applications
(2015)
Chang, Hsiao-Chun
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Fan, Cheng-Han
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Chou, Yi-Chia
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Chen, Kuan-Neng
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電子物理學系
In this paper, the self-assembly technology is investigated in order to apply on the alignment method to achieve rapid and accurate multichip-to-wafer stacking. By virtue of distinct liquid surface tensions between hydrophilic and hydrophobic materials, the hydrophilic chips can be self-aligned to the hydrophilic substrate which is defined by the surrounding hydrophobic substrate. The surface quality of hydrophobic film with self-assembled monolayers (SAMs) based on self-assembled mechanism strongly affects the performance of alignment. The surface quality of SAMs film which depends on experimental parameters such as dip-coating time and heating time is critical to determine the accuracy of alignment. Moreover, the chip shape and size also have an impact on the alignment accuracy. By improving the misalignment, a good design by the self-assembled mechanism for the self-alignment method can be applied in the bonding technology.
Ultrahigh-Density 256-Channel Neural Sensing Microsystem Using TSV-Embedded Neural Probes
(2017-10-01)
Huang, Yu-Chieh
;
Huang, Po-Tsang
;
Wu, Shang-Lin
;
Hu, Yu-Chen
;
You, Yan-Huei
Highly integrated neural sensing microsystems are crucial to capture accurate signals for brain function investigations. In this paper, a 256-channel neural sensing microsystem with a sensing area of 5 x 5 mm(2) is presented based on 2.5-D through-silicon-via (TSV) integration. This microsystem composes of dissolvable mu-needles, TSV-embedded mu-probes, 256-channel neural amplifiers, 11-bit area-power-efficient successive approximation register analog-to-digital converters, and serializers. This microsystem can detect 256 electrocorticography and local field potential signals within a small area of 5 mm x 5 mm. The neural amplifier realizes 57.8 dB gain with only 9.8 mu W per channel. The overall power of this microsystem is only 3.79mW for 256-channel neural sensing. A smaller microsystem with dimension of 6 mm x 4 mm has been also implanted into rat brain for somatosensory evoked potentials (SSEPs) recording by using contralateral and ipsilateral electrical stimuli with intensity from 0.2 to 1.0 mA, and successfully observed different SSEPs from left somatosensory cortex of a rat.
Uneven-Topography-Chip Packing Approach Using Double-Self-Assembly Technology for 3-D Heterogeneous Integration
(2018-02-01)
Shen, Wen-Wei
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Chang, Hsiao-Chun
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Yang, Yu-Tao
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Hu, Yu-Chen
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Chen, Kuan-Neng
Although chip-level heterogeneous integration has high yield for production, low-throughput issue of chip-to-wafer bonding is necessary to be improved. Due to the uneven topography and small chip size, handling issue and alignment accuracy are important factors that impact the difficulty in heterogeneous integration. Self-assembly technology has a high potential to be applied in 3-D heterogeneous integration. By using hydrophobic film to define the stacking area, hydrophilic chips can be assembled to realize alignment process on these areas through wafer surface tension in a very short time. With this concept, double-self-assembly technology is accomplished to resolve both handling and alignment issues for uneven-topography-chip integration. In this paper, different chip sizes of mu-pillar are simulated to investigate the optimal water volume for double-self-assembly process. High alignment accuracy of misalignment measurement can be accomplished with the optimal water volume. Furthermore, microstructure of Cu/In bonded structures and corresponding electrical analyses are evaluated, while various reliability tests are investigated for bonding quality. Excellent results verify that the double-self-assembly technology could be applied to 3-D heterogeneous integration for uneven-topography-chip integration.