Browsing by Author "Chang, K. H."
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Item type:Item, Deep Learning Based AOI System with Equivalent Convolutional Layers Transformed from Fully Connected Layers(2019-01-01) ;Tsai, Y. H. ;Lyu, N. Y. ;Jung, S. Y. ;Chang, K. H.Chang, J. Y.The rise of deep learning, especially in the realm of computer vision, paves ways of leveraging automatic optical inspection systems to a higher level. Convolutional neural networks and its derivatives might be the most widely used architectures for defect inspection tasks. In real cases the amount of collected data is often not large, so transferring learning and data augmentation are necessary. In this paper, we explain some details how we implement the deep learning based AOI system where fully connected layers are replaced by convolutional layers, then a classification heat map is output after post-processing. We examine the performance of our model with two data sets collected in industrial manufacturing cases. We further propose an idea to transfer models pretrained on augmented data of different sizes cropped from original image to the present classification task for possible improvements of the performance.Item type:Item, DEVELOPMENT AND APPLICATION OF A DECISION MODEL FOR THE INTEGRATED PRODUCTION AND MATERIAL PLANNING OF COLOR FILTER MANUFACTURING INDUSTRY: AN EMPIRICAL STUDY(2010) ;Leu, C. T. ;Wen, T. C. ;Chang, K. H. ;工業工程與管理學系Department of Industrial Engineering and ManagementColor Filters (CF) is a critical module of TFT-LCD industry whose products are widely applied to the customer electronics products. Since the color filters manufacturing stays in the 1-tier enterprise of the supply network of the TFT-LCD industry, its logistics planning is quite complex. This paper develops a LP-based planning method to support the logistics of a color filter manufacturing company. This developed planning model focuses on the mid-term planning, considering the issues in terms of production and material requirement planning in an integrated way. For application, this developed method is implemented by the optimization software LINGO and then integrated to the database system as decision support. To test the quality of this method, 52 weeks of real factory data are studied, and the validation result shows a variation less than 10%.Item type:Item, National Project on 45 to 32 nm Metal Oxide Semiconductor Field Effect Transistors for Next Century IC Fabrications(2008) ;Hwang, Huey-liang ;Wang, C. W. ;Chang, K. H. ;Tsai, C. H.Leou, K. C.It is well known that the Taiwan Semiconductor industries play the very key roles for the worldwide IC foundry, and the advanced research of nanoelectronics is the lifeline for its long term developments. Professor Huey-liang Hwang effectively integrated the most outstanding research team and resource in Taiwan on the National Project on Nanometer CMOS Transistors for the 21 century, which is sponsored by the Ministry of Economic Affairs of ROC. A dozen of Professors from NTHU( National Tsing Hua University) with expertise at the novel materials and analysis and NCTU( National Chiao Tung University) with expertise at devices and reliability are devoted to the studies and are in collaboration with the world-wide-known company such as TSMC, and breakthrough of the key technologies of 45-32 nm technologies are achieved. The objective of this project is focused on the development of advanced metal gate/high-k MOSFET for 45 nm node generation and beyond, the efforts include the world first successful suppression the oxide/Si interfacial layer formation by using a bi-layer composite of HfO2 3.2 nm (ALD)/HfO2 1.5 nm (MBE), the results show a dielectric constant of 16 and an EOT of 1.15 nm, a Dit was estimated to be 4.6x10(11)cm(-2)eV(-1) with the leakage at Vfb-1V being 8.5x10(-6) A/cm(2). Also, the thermal stability of HfO2, HfAlOx alloy and Al2O3/HfO2 stack, prepared by ALD were compared, the incorporation of Al in alloy form gave superior characteristics by retaining an amorphous structure up to 1000 C, which suppress the leakage current and retards growth of the interfacial layer giving the least increment of EOT and interface traps. Besides, by incorporating Al into TiO2 gave an EOT value of the Al2O3/TiAlOx/Al2O3 film down to 0.8 nm. Furthermore, high selectivity was obtained via etching the HfAlO and silicon wafer with pattern using the ICP Plasma. In this project, YbSi metal gate for n-MOSFET and IrSi metal gate p-MOSFET were successfully fabricated for the HfAlON MESFET. The results showed the good effective workfunction of 4.15 and 4.9 eV and no degradation of gate dielectric current and mobility in the YbxSi/HfAlON and IrxSi/HfAlON FUSI-gates by reducing the metal diffusion at lower temperatures.