Browsing by Author "Chang, Kun-Chun"

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A Fast Hysteretic Buck DC-DC Converter with Start-up Overshoot Suppression Technique
(2012-01-01)
Chang, Kun-Chun
;
Wey, Chin-Long
;
電機學院
;
College of Electrical and Computer Engineering
The voltage-mode hysteretic converter is one of ripple-based regulators. The converter has the salient features of fast transient response, good conversion efficiency, and simple architecture. However, the major drawbacks include large voltage ripple caused by propagation delay path and excess overshoot voltage during the start-up period. This paper presents an overshoot suppression technique uses two-phase PMOS transistors to optimize the solution among the overshoot voltage, transistor size, and conversion efficiency. There exists a design trade-offs between start-up overshoot voltage and settling time. Results show that, with the proposed suppression technique, the overshoot voltage is reduced from 340mV to 74.4mV. However, the settling time is increased from 15.1us to 21.74 us.
Enhancement of Controller Area Network (CAN) Bus Arbitration Mechanism
(2013-01-01)
Wey, Chin-Long
;
Hsu, Chung-Hsien
;
Chang, Kun-Chun
;
Jui, Ping-Chang
;
電機工程學系
FlexRay protocol includes a static time-triggered and a dynamic event-triggered segment, where the static segment enabling a guaranteed real-time transmission of critical data, while the dynamic segment (optional) for low-priority and event-triggered data. FlexRay is operated in a synchronous fashion. Based on the CAN (Controller Area Network) bus arbitration mechanism, this study takes the most significant bit (MSB), D10, of the identifier to assign the messages to be either static-like or dynamic-like, where the static-like type has higher priority than the dynamic-like type. Both types are operated in an asynchronous fashion as the conventional CAN protocol. With the designers\' experience with good schedulability, the above assignment can ensure that all critical messages be sent out before their deadline and no one message type hugs the bus. However, the salient feature is achieved at the cost of losing one bit for the identifier.