Browsing by Author "Chang, LC"

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A software/hardware cooperated stack operations folding model for Java processors
(2004-08-01)
Ton, LR
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Chang, LC
;
Shann, JJ
;
Chung, CP
;
資訊工程學系
Java has become the most important language in the Internet area, but the execution performance of Java processors is severely limited by the true data dependency inherited from the stack architecture defined by Sun's Java Virtual Machine. A sequential hardware-based folding algorithm-POC folding model was proposed in the earlier research to eliminate up to 80.1% of stack push and pop bytecodes. The remaining stack push and pop bytecodes cannot be folded due to the sequential checking characteristic of the POC folding model. In this paper, a new software/hardware cooperated folding algorithm-T-POC (Tagged-POC) folding model is proposed to enhance the folding ability of the POC-based Java processors to fold the remaining stack push and pop bytecodes. While executing the bytecodes, bytecode grouping and rescheduling are done by a T-POC bytecode rescheduler to generate the new binary class images in memory. With the cooperation of the hardware-based POC folding model, higher execution performance can be achieved by executing the newly generated class images. Statistical data show that 94.8% of stack push and pop bytecodes can be folded, and the overall execution speedups of 2-, 3-, and 4-foldable strategies are 1.72, 1.73 and 1.74, respectively, as compared to a single-pipelined stack machine without folding. (C) 2003 Elsevier Inc. All rights reserved.
An analytical POC stack operations folding for continuous and discontinuous Java bytecodes
(2002-09-01)
Ton, LR
;
Chang, LC
;
Chung, CP
;
資訊工程學系
;
Department of Computer Science
The execution performance of a stack-based Java virtual machine (JVM) is limited by the true data dependency. To enhance the performance of the JVM, a stack operations folding mechanism for the picoJava-I/II processor was proposed by Sun Microsystems to fold 42.3% stack operations. By comparing the continuous bytecodes with predefined folding patterns in instruction decoder, the number of push/pop operations in between the operand stack and the local variable could be reduced. In this study, an enhanced POC (EPOC) folding model is proposed to further fold the discontinuous bytecodes that cannot be folded in continuous bytecodes folding mechanisms. By proposing a stack re-order buffer (SROB) to help the folding check processes, the EPOC folding model can fold the stack operations perfectly with a small size of SROB implementation. Statistical data shows that the four-foldable strategy of the EPOC folding model can eliminate 98.8% of push/pop operations with an instruction buffer size of 7 bytes and the SROB size of eight entries. (C) 2002 Elsevier Science B.V. All rights reserved.
Comparison of genetic algorithms with other methods for the ambient groundwater monitoring network planning
(2000)
Chang, LC
;
Su, HC
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土木工程學系
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Department of Civil Engineering
This work concentrates on the ambient groundwater monitoring network design. This kind of planning largely concerns itself with constructing a flexible and efficient monitoring network. This study presents a novel procedure that combines genetic algorithms (GAs) with geostatistical theory. The proposed method is compared to other methods that also integrate geostatistical theory with other optimization schemes, including the sequential design method (SDM), branch and bound method (BBM) and non-linear programming method (NPM). These methods are implemented and applied to a simplified field case. The findings indicate that the SDM technique provides a computationally efficient solution for a preliminary study. On the other hand, the multiple choices given by the GAs provide decision-makers with flexibility to consider factors that geostatistics can not.
Design of an optimal folding mechanism for Java processors
(2002-11-10)
Ton, LR
;
Chang, LC
;
Shann, JJ
;
Chung, CP
;
資訊工程學系
Java has become the most important language in the Internet area, but its execution performance is severely limited by the true data dependency inherited from the stack architecture defined by the Sun's Java Virtual Machine (JVM). To enhance the performance of the JVM, a stack operations folding mechanism for the picoJava-II processor was proposed by Sun Microsystems to fold 42.3% stack push/pop instructions. A systematic folding algorithm-Producer, Operator, and Consumer (POC) folding model was proposed in the earlier research to eliminate up to 82.9% of stack push/pop instructions. The remaining push and pop instructions cannot be folded due to the sequential checking characteristic of the POC folding model. A new folding algorithm-enhanced POC (EPOC) folding model is proposed in this paper to further fold the remaining push and pop instructions. In the EPOC folding model, stack push/pop instructions are folded with the proposed Stack Reorder Buffer (SROB) architecture. With a small SROB size of 584 bits, almost all of the stack push/pop instructions can be folded with the precise exception handling capability. Statistical data shows that 98.8% of the stack push/pop instructions can be folded, and the average execution performance speedup of a 4-foldable processor with a 7-byte instruction buffer is 1.74 as compared to a traditional single-pipelined stack machine without folding. (C) 2002 Elsevier Science B.V. All rights reserved.
Designing an optimal multivariate geostatistical groundwater quality monitoring network using factorial kriging and genetic algorithms
(2006-05-01)
Yeh, MS
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Lin, YP
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Chang, LC
;
土木工程學系
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Department of Civil Engineering
The optimal selection of monitoring wells is a major task in designing an information-effective groundwater quality monitoring network which can provide sufficient and not redundant information of monitoring variables for delineating spatial distribution or variations of monitoring variables. This study develops a design approach for an optimal multivariate geostatistical groundwater quality network by proposing a network system to identify groundwater quality spatial variations by using factorial kriging with genetic algorithm. The proposed approach is applied in designing a groundwater quality monitoring network for nine variables (EC, TDS, Cl-, Na, Ca, Mg, SO42-, Mn and Fe) in the Pingtung Plain in Taiwan. The spatial structure results show that the variograms and cross-variograms of the nine variables can be modeled in two spatial structures: a Gaussian model with ranges 28.5 kin and a spherical model with 40 km for short and long spatial scale variations, respectively. Moreover, the nine variables can be grouped into two major components for both short and long scales. The proposed optimal monitoring design model successfully obtains different optimal network systems for delineating spatial variations of the nine groundwater quality variables by using 20, 25 and 30 monitoring wells in both short scale (28.5 km) and long scale (40 km). Finally, the study confirms that the proposed model can design an optimal groundwater monitoring network that not only considers multiple groundwater quality variables but also monitors variations of monitoring variables at various spatial scales in the study area.
Development and comparison of different methods of monitoring network design based on co-kriging
(1998)
Chang, LC
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Chiu, YF
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土木工程學系
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Department of Civil Engineering
This study develops and compares several network design methods for groundwater monitoring based on the geostatistics theory and optimization schemes. Depending on the optimization structure, those methods are classified as sequential design model, branch and bound model, and non-linear programming model. The sequential design model extends the variance reduction method proposed by Rouhani in 1985. Theoretically, it is not a truly optimal design scheme. On the other hand, the branch and bound model, as proposed by Ben-Jemaa et al. in 1994 can compute a global optimal solution; however, it requires much mon computation than the sequential design model. The non-linear programming method, extending the methods proposed by Lin in 1995, can search the optimal locations of the monitoring wells within the planning area without pre-defining a set of available sites, in addition, the solution is local optimal. In this study, we applied those methods to the network planning in the Ping-Tung Plain of southern Taiwan. According to our results, the differences of the solutions for different models decrease with an increase of all the monitoring wells. Owing to its efficiency and flexibility, the sequential design model is the most practical method in general application, although the solution is not necessarily optimal.
Dynamic optimal ground water remediation including fixed and operation costs
(2002-09-01)
Chang, LC
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Hsiao, CT
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土木工程學系
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Department of Civil Engineering
lit time-varying ground water remediation, the lack of an optimal control algorithm to simultaneously consider fixed costs and time-varying operating costs makes it nearly impossible to obtain an optimal solution. This study presents a novel algorithm that integrates a genetic algorithm (GA) and constrained differential dynamic programming (CDDP) to solve this time-varying ground water remediation problem. A GA can easily incorporate the fixed costs associated with the installation of wells. However, using a GA to solve for time-varying policies would dramatically increase the computational resources required. Therefore, the CDDP is used to handle the subproblems associated with time-varying operating costs. A hypothetical case study that incorporates fixed and time-varying operating costs is presented to demonstrate the effectiveness of the proposed algorithm. Simulation results indicate that the fixed costs can significantly influence the number and locations of wells, and a notable total cost savings can be realized by applying the novel algorithm herein.
Dynamic optimal groundwater management with inclusion of fixed costs
(2002-01-01)
Hsiao, CT
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Chang, LC
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土木工程學系
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Department of Civil Engineering
Obtaining optimal solutions for groundwater resources planning problems, while simultaneously considering both fixed costs and time-varying pumping rates, is a challenging task. Application of conventional optimization algorithms such as linear and nonlinear programming is difficult due to the discontinuity of the fixed cost function in the objective function and the combinatorial nature of assigning discrete well locations. Use of conventional discrete algorithms such as integer programming or discrete dynamic programming is hampered by the large computational burden caused by varying pumping rates over time. A novel procedure that integrates a genetic algorithm (GA) with constrained differential dynamic programming (CDDP) calculates optimal solutions for a groundwater resources planning problem while simultaneously considering fixed costs and time-varying pumping rates. The GA deter-mines the number and locations of pumping wells with operating costs then evaluated using CDDP This study demonstrates that fixed costs associated with installing wells significantly impact the optimal number and locations of wells.
Effect of B2O3 nano-coating on the sintering behaviors and electrical microwave properties of Ba(Nd2-xSmx)Ti4O12 ceramics
(2004-07-01)
Chang, LC
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Chiou, BS
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
Ba(Nd0.8Sm0.2)(2)Ti4O12 ceramics prepared by conventional solid-state sintering have a dielectric constant of about 80 and a nearly zero temperature coefficient of resonant frequency; however, the sintering temperature is above 1350degreesC. Doping with B2O3 (up to 5 wt%) promotes the densification and dielectric properties of BNST ceramics. It is found that coating BNST powder with thin B2O3 layer of about 180 nm reduces the sintering temperature to below 1020degreesC. The effects of B2O3 nano-coating on the dielectric microwave properties and the microstructures of BNST ceramics are investigated. Ninety-six percent of theoretical densities is obtained for specimens coated with 2 wt% B2O3 sintered at 960degreesC and the samples exhibit significant (002) preferred orientation and columnar structure.
Effect of glass additions on the sintering behaviors and electrical microwave properties of BaO-Nd2O3-Sm2O3-TiO2 ceramics
(2004-03-01)
Chang, LC
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Chiou, BS
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Lee, WH
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
The effect of Al2O3-doped silica glass (AS-glass) addition on the structure and dielectric properties of the BaO-Nd2O3-Sm2O3-TiO2 (BNST) microwave materials was investigated. This BNST material has a dielectric constant (k) of 80 and a quality factor (Q x f) of 6000 GHz when sintered at 1350degreesC for 2 h. Both the microstructure and the microwave dielectric characteristics were determined as a function of the sintering temperature and glass content. A Q x fas high as 8700 GHz was achieved in ceramics added with 20 wt% glass, however, the k value drops to 30. The high Q x f value is attributed to the improved densification of the dielectric when glass is added. Results of X-ray diffraction experiments indicate that glass addition enhances the growth in the longitudinal direction of the columnar crystal and a preferred (002) orientation. The presence of columnar structure plays an important role in the improvement of the microwave dielectric properties. (C) 2004 Kluwer Academic Publishers.
Electrical Behavior of BaO-Nd2O3-SM2O3-TiO2 with glass/oxide additives analyzed by impedance spectroscopy
(2005-09-01)
Chang, LC
;
Chiou, BS
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電子工程學系及電子研究所
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Innovative Packaging Research Center
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Department of Electronics Engineering and Institute of Electronics
The electrical properties of BaO-Nd2O3-Sn2O3-TiO2 ceramics doped with low loss glass or low melting point oxide B2O3 are evaluated by impedance spectroscopy. Glass or B2O3 is doped as liquid phase sintering aid. Doping of glass/B2O3 enhances both the growth in the longitudinal direction of the columnar crystal and the preferred orientation of (002). The grain size increases and grain boundary decreases with the increase of dopant. Both the grain and grain-boundary resistivities decrease with the increase of dopant. The grain boundary activation energy for charge transport is larger than that of the grain activation energy. Possible mechanisms for the electrical behavior of the liquid-phase sintered Ba0-Nd2O3-Sm2O3-TiO2 ceramics are proposed and discussed.
Enhancing Java processor performance with smart dynamic folding
(2000-11-01)
Chang, LC
;
Ton, LR
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Kao, MF
;
Chung, CP
;
資訊工程學系
The Java processor is suitable for Internet appliances or embedded controllers due to its speed and low memory requirement. However, its performance is severely limited by true data dependence. In this work, we present a smart and dynamic stack operations folding - POC model-based folding. The stack instructions are classified into P,O, and C three types. The folding algorithm can automatically determine the folding relations among all the instructions based on the type and folding attributes of each instruction. The proposed algorithm has no requirement to match different patterns. A typical folding mechanism design based on this model is then introduced. Also, the performance of various folding methods based on the POC model is evaluated. Simulation data indicate that the 4-foldable method eliminates 84% of all stack operations. Furthermore, the 2-, 3-, and 4-foldable methods accelerate the overall program by 1.22, 1.32 and 1.34, respectively, as compared to a Java processor without folding.
Exploiting Java bytecode parallelism by enhanced POC folding model
(2000)
Ton, LR
;
Chang, LC
;
Chung, CP
;
資訊工程學系
;
Department of Computer Science
Instruction-level parallelism of stack codes like Java is severely limited by accessing the operand stack sequentially. To resolve this problem in Java processor design, our earlier works have presented stack operations folding to reduce the number of push/pop operations in between the operand stack and the local variable. In those studies, Java bytecodes are classified into three major POC types. Statistical data indicates that the 4-foldable strategy of the POC folding model can eliminate 86% of push/pop operations. In this research note, we propose an Enhanced POC (EPOC) folding model to eliminate more than 99% of push/pop operations with an instruction buffer size of 8 bytes and the same 4-foldable strategy. The average issued instructions per cycle for a single pipelined architecture is further enhanced from 1.70 to 1.87.
Instruction folding in Java processor
(1997)
Ton, LR
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Chang, LC
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Rao, MF
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Tseng, HM
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Shang, SS
Traditionally, the performance of a stack machine was limited by the true data dependency. A performance enhancement mechanism - Stack Operations Folding - was used in Srm Microelectronics' picoJava design [1][2] and it can reduce up to 60% of all stack operations. in this paper, we use the Java bytecode language as the targe; machine language, and study its instruction folding on a proposed machine model. Three folding strategies: 2-foldable, 3-foldable and 4-foldable, were simulated and evaluated. Statistical data show that our third folding strategy eliminates 73% of all stack operations, and each strategy fins an overall program speedup of 1.19, 1.25 and 1.26, respectively, as compared to a traditional stack machine. Moreover, a Java machine model suitable for instruction folding, together with its pipeline stages, are presented. lt seems to have the best cost/performance effectiveness of a Java stack machine if six bytes decoder width and the second folding strategy - the three-foldable strategy - are adopted.
Modeling of watershed flood forecasting with time series artificial neural network algorithm
(1998)
Yang, CC
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Chen, CS
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Chang, LC
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土木工程學系
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Department of Civil Engineering
In order to forecast the flood discharge of downstream gauging station by the artificial neural network (ANN) algorithm efficiently, the linear transfer function method (LTF) and parameter significance T-test are proposed to determine the number of network input elements. In addition, time series ARIMA model for all upstream gauging stations is constructed to offer the forecasting discharges which are input data for watershed ANN flood forecasting model. From the application in Wu-Shi basin, the model verified results of the following one hour through the following three hours flood forecasting are good. One may conclude that the algorithm of time series ANN flood forecasting can simulate the phenomena of flood transportation and forecast the flood discharge of watershed efficiently.
Optimal remediation design in groundwater systems by intelligent techniques
(2005)
Chu, HJ
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Hsiao, CT
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Chang, LC
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土木工程學系
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Department of Civil Engineering
This research develops an optimal planning model for pump-treat-inject based groundwater remediation systems. Optimizing the design of the pump-treat-inject system is a nonlinear, dynamic and discrete optimization problem. This study integrates the Genetic Algorithm (GA) and Differential Dynamic Programming (DDP) to solve this highly complex problem. The proposed model considers both the cost of installing wells (fixed cost) and the operating cost of pumping, injection and water treatment. Minimizing the total cost and meeting the water quality constraints, the model computes the optimal number and location of wells, as well as the associated optimal pumping and injection schemes. This work also investigates many factors that affect the optimal design of a remediation system, such as, various numerical cases revealing the time-varying pumping and injection rate, and the requirement to balance the total volume between pumping and injection that can significantly influence the optimal design.
Optimizing remediation of an unconfined aquifer using a hybrid algorithm
(2005-11-01)
Hsiao, CT
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Chang, LC
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土木工程學系
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Department of Civil Engineering
We present a novel hybrid algorithm, integrating a genetic algorithm (GA) and constrained differential dynamic programming (CDDP), to achieve remediation planning for an unconfined aquifer. The objective function includes both fixed and dynamic operation costs. GA determines the primary structure of the proposed algorithm, and a chromosome therein implemented by a series of binary digits represents a potential network design. The time-varying optimal operation cost associated with the network design is computed by the CDDP, in which is embedded a numerical transport model. Several computational approaches, including a chromosome bookkeeping procedure, are implemented to alleviate computational loading. Additionally, case studies that involve fixed and time-varying operating costs for confined and unconfined aquifers, respectively, are discussed to elucidate the effectiveness of the proposed algorithm. Simulation results indicate that the fixed costs markedly affect the optimal design, including the number and locations of the wells. Furthermore, the solution obtained using the confined approximation for an unconfined aquifer may be infeasible, as determined by an unconfined simulation.
Stack operations folding in Java processors
(1998-09-01)
Chang, LC
;
Ton, LR
;
Kao, MF
;
Chung, CP
;
資訊工程學系
Traditionally, the performance of a stack machine has been limited by the true data dependency. A performance enhancement mechanism, stack operations folding, was used in Sun Microelectronics' picoJava-I design, and it can fold up to 60% of all stack operations. The authors use the Java bytecode language as the target machine language, and study Java instruction folding on a proposed folding model, the POC model, which is used to illustrate the theoretical folding operations. Various practical folding strategies based on the POC model are introduced and evaluated. Statistical data show that the 4-foldable strategy eliminates 84% of all stack operations, and the 2-, 3-, and 4-foldable strategies result in overall program speedups of 1.22, 1.32 and 1.34, respectively, as compared to a stack machine without folding. Furthermore, the 4-foldable strategy is the most practical and cost effective of a Java stack machine design with a decoder width of 8 bytes. Circuit simulation results show that a 100MHz 4-foldable folding mechanism can be realized with 0.6 mu m CMOS standard cells, or 240MHz with 0.251 mu m CMOS technology.