Browsing by Author "Chang, Ming-Tung"

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Statistical Methodology to Identify Optimal Placement of On-Chip Process Monitors for Predicting Fmax
(2016)
Mu, Szu-Pang
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Chang, Wen-Hsiang
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Chao, Mango C. -T.
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Wang, Yi-Ming
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Chang, Ming-Tung
In previous literatures, many approaches use ring oscillators or other process monitors to correlate the chip\'s maximum operating frequency (F-max). But none of them focus on the placement of these on-chip process monitors (OPMs) on a chip. The placement will greatly influence the accuracy of a prediction model. In this paper, we first propose a simulation, framework to sample a chip\'s F-max and it\'s OPM result, These samples are used to develop our methodology of OPM placement and to verify the effectiveness of an OPM placement. Then, a model-fitting framework is presented to correlate the OPMs\' result to chip\'s F-max. Finally, we propose a methodology to idenify optimal placement of OPM for predicting F-max. The experiments demonstrate the effectiveness of our methodology in both simulation and silicon data.
Testing Retention Flip-flops in Power-gated Designs
(2013)
Hsu, Hao-Wen
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Kuo, Shih-Hua
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Chang, Wen-Hsiang
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Chen, Shi-Hao
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Chang, Ming-Tung
This paper focuses on tackling two problems on testing retention flip-flops in power-gated designs. The first one is how to reduce the virtual-V-DD discharge time after entering the sleep mode. The second one is how to avoid the test escape caused by the unintended initial value of the retention flip-flop during the restore function. To solve the first problem, we propose a novel ATPG framework to generate repeatedly toggling pattern pairs that can create maximal virtual-V-DD drop for a cycle. To solve the second problem, we propose a new test procedure to avoid the unintended initial value of the retention flip-flop after restoring. The effectiveness of the proposed ATPG framework and the new test procedure will be validated through SPICE simulation based on an industrial MTCMOS cell library.