Browsing by Author "Chang, Wei-Ling"

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2.4-GHz 7.4-mW 300-kHz Flicker-Noise-Corner Direct Conversion Receiver Using 0.18 mu m CMOS and Deep-N-Well NPN BJT
(2013)
Chang, Wei-Ling
;
Meng, Chin-Chun
;
Syu, Jin-Siang
;
Wang, Chia-Ling
;
Huang, Guo-Wei
A low-power low-flicker-noise receiver is demonstrated using 0.18 mu m CMOS technology. Vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are used to substitute the mixer switching core and the input stage of subsequent IF VGA. Compared with the conventional CMOS mixer, the excellent flicker noise performance is obtained. As a result, the receiver achieves a 47 dB voltage gain at 2.4-GHz, and the noise figure is 9.6 dB at IF=100 kHz and 5.6 dB for IF>300 kHz. The total current consumption is 4.3 mA at 1.8 V supply voltage.
30-GHz mHEMT Divide-by-Three Injection-Locked Frequency Divider With Marchand Balun
(2015)
Chang, Wei-Ling
;
Meng, Chinchun
;
Tsung, Kuan-Chang
;
Huang, Guo-Wei
;
電子工程學系及電子研究所
In this paper, the first fully integrated 0.15-mu m InAlAs/InGaAs metamorphic high electron mobility transistor (mHEMT) divide-by-three injection locked frequency divider (ILFD) with Marchand balun is demonstrated. The mHEMT technology has 110-GHz cutoff frequency and high tranconductance. Moreover, the Marchand Balun on the semi-insulating GaAs substrate has a low-loss property to provide broadband and balanced differential signals at millimeter wave frequencies. The divide-by-three ILFD performs the locking range from 28.8 GHz to 31.6 GHz under the supply voltage of 6 V and the core current consumption is 17.8 mA.
5-6 GHz CMOS Low-Noise Direct Conversion Receiver Using a Differential RF VGA with a Differential Inductor Load
(2016)
Chang, Wei-Ling
;
Meng, Chinchun
;
Chang, Chih-Kai
;
Huang, Guo-Wei
;
電子工程學系及電子研究所
A low-noise low-power direct conversion receiver with a differential RF VGA is demonstrated using 0.18um CMOS technology. A topology that uses a differential inductor load for a differential RF VGA is employed for the single-to-differential conversion. Since the common-mode rejection ratio of a differential variable gain amplifier is increased by the mutual magnetic coupling in a differential inductor load, this work achieves noise floor less than 5 dB covering the 5-6 GHz band. Moreover, the conversion gain is around 50 dB and the total current consumption is 4.75 mA at 1.8 V supply voltage.
5.8 GHz 4.7 mA Zero-IF Passive Mixer Receiver Using a Step-Down Transformer for Gain Enhancement
(2015)
Chang, Wei-Ling
;
Meng, Chinchun
;
Lin, Chung-Yo
;
Huang, Guo-Wei
;
電子工程學系及電子研究所
This paper demonstrates a 5.8 GHz low-power, low flicker -noise I/Q zero-IF receiver in 0.18-um CMOS process. Passive resistive mixers and deep-n-well vertical-NPN (V-NPN) bipolar junction transistors (BJTs) as the transconductance stage of the IF amplifier are employed to improve the flicker noise problem. The passive mixer is in current mode operation and thus a step-down transformer is used at the LNA output to enhance the current gain. By carefully designing the 4:2 stepdown transformer, the conversion gain of the whole zero-IF receiver performs up to 51 dB when LO power is 6 dBm, and the 3-dB bandwidth covers 5.7-6.1 GHz with the current consumption of 4.7 mA at 1.8 V supply. The flicker noise corner is 100 kHz and the noise floor is 6.5 dB. The I/Q amplitude mismatch and phase difference are below 0.05 dB and 2.5, respectively.
9.9-mA 5-6 GHz CMOS Sub-Harmonic Direct-Conversion Receiver Using Deep N-Well BJT
(2014-01-01)
Chang, Wei-Ling
;
Meng, Chin-Chun
;
Syu, Jin-Siang
;
Wang, Chia-Ling
;
Huang, Guo-Wei
A low-power sub-harmonic direct-down receiver is demonstrated using 0.18 mu m CMOS technology. The dynamic range of the receiver is increased by incorporating voltage gain controls with wide tuning range at RF and IF stages. For the flicker noise problem, vertical-NPN bipolar junction transistors (BJTs) in standard CMOS process are employed as the mixer switching core and at the input stage of the subsequent IF VGA. As a result, this work achieves a 45 dB gain from 5-6 GHz with 6 dB noise floor. The total current consumption is 5.5 mA at 1.8 V supply voltage.
Balanced Noise Design of Dual-Band 2.4/5-GHz pHEMT LNAs
(2020-01-01)
Meng, Chinchun
;
Chang, Wei-Ling
;
Hsiao, Yu-Chih
;
Li, Meng-Che
;
Chien, Hsin-Yi
This paper presents dual-band 2.4/5-GHz dual-band pHEMT LNAs based on a balanced noise design approach using 0.15 m pHEMT technology. A dual-band LNA has two input match frequencies without simultaneous noise match at these two frequencies especially when the extrinsic loss caused by the inductor is absent. Noise parameters as a function of frequencies for a dual-band FET LNA based on the balanced noise performance are developed. The fully integrated pHEMT LNA achieves power gain of 18 dB at 2.4 GHz and 12 dB at 5 GHz and noise figure about 3 dB at 2.4 GHz and 5 GHz, respectively, at 12.6 mA and 3 V. The pHEMT LNA with a bondwire inductor at input match demonstrates a distinct balanced noise performance.
E-Band RF-to-DC Converter Using Schottky Diode in 0.18-mu m CMOS Technology
(2016)
Chang, Wei-Ling
;
Meng, Chinchun
;
Fu, Tzu-Chien
;
Huang, Guo-Wei
;
電機工程學系
This paper demonstrates a millimeter-wave RF-to-DC converter based on Schottky-barrier diodes using 0.18-mu m CMOS technology. The Schottky-barrier diode has a cutoff frequency of 400 GHz and a low turn-on voltage of 0.3 V. In the RF-to-DC quadrupler, the difference in turn-on voltages between the Schottky-barrier diode and n-well to p-substrate parasitic pn junction prevents the pn junction from turning on with an effect similar to the Schottky diode clamp in Schottky TTL circuits. The input matching has a better than 10 dB return loss from 50 GHz to 100 GHz. The RF-to-DC quadrupler generates a 3.15 V DC voltage at 84 GHz.
Ka-Band pHEMT Quadrupler with Injection and Extraction from Oscillator Frequency Doubling Points
(2014-01-01)
Chang, Wei-Ling
;
Meng, Chinchun
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Syu, Jin-Siang
;
Wu, Yan-Feng
;
Huang, Guo-Wei
A Ka-band injection-locked quadrupler MMIC is demonstrated using 0.15-mu m pseudomorphic high electron mobility transistor (pHEMT) technology. pHEMT technology is suitable to the millimeter wave quadrupler by using the topology of high-order sub-harmonic injection lock based on a cross-coupled oscillator. Furthermore, thanks to the semi-insulating GaAs substrate, it is easy to implement microwave/millimeter wave passive components to achieve accurate balanced signals. As a result, the measured output power of the quadrupler is 8 dBm for frequency of 30 GHz and the locking bandwidth reaches 300 MHz.
Programmable-Gain Constant-IF-Bandwidth SiGe BiCMOS Upconversion Micromixer at 2.4/5.8 GHz Using Current-Mode Approach
(2017-01-01)
Syu, Jin-Siang
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Chang, Wei-Ling
;
Meng, Chinchun
;
Lin, Yi-Chen
;
Huang, Guo-Wei
A 2.4/5.8-GHz dual-band programmable-gain upconverter with a constant IF bandwidth is demonstrated using 0.35-mu m SiGe BiCMOS technology. Using a current-mode design approach, the input IF bandwidth remains the same at different gain settings. A dual-band LC current combiner is used at the mixer RF output to combine differential signals to a single-ended one at two bands. Then, a wideband amplifier is cascaded after the dual-band mixer. The demonstrated upconverter achieves maximum gain of -4/-3 dB at 2.4/5.8 GHz, respectively. In addition, four gain steps with 5-dB gain difference between each step are controlled by a two-bit digital circuit. The total current consumption is 26 mA at a 4-V supply.
SBD Layout Optimization with Effect of N-well to p-Substrate pn Junctions in 0.18 mu m CMOS Process
(2016-01-01)
Chang, Wei-Ling
;
Meng, Chinchun
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Huang, Guo-Wei
;
電機工程學系
;
Department of Electrical and Computer Engineering
The effect of layout on silicon SBD in CMOS process is studied in this paper. The size of anode area not only affects the series resistance and SBD junction capacitance but also causes serious parasitic effect from cathode to the p-substrate. Typically, an SBD of a small unit anode has a better cut-off frequency than that of a large unit anode. The cutoff frequency of a small anode Schottky diode is about 700 GHz in a standard 0.18 mu m CMOS process. However, a SBD with a small unit anode is prone to the effect of p-substrate to N-well pn junction capacitor. This paper has characterized SBDs of different anode sizes with bottom and side-wall effect of p-substrate to N-well to select an optimal unit-anode area by reducing the substrate effect and providing sufficient f(T) for high frequency applications.
Temperature Insensitive PA Bias Circuit With Digital Control Interface Using InGaP/GaAs HBT Technology
(2015-01-01)
Chang, Wei-Ling
;
Meng, Chinchun
;
Wong, Shyh-Chyi
;
Chien, Hwey
;
Huang, Guo-Wei
This paper demonstrates a new temperature insensitive bias circuit using a Wilson current mirror for the InGaP/GaAs HBT power amplifier. The Wilson current mirror has a high impedance node for connecting an on/off digital interface and a stable voltage node for injection of feedback signals to achieve a temperature insensitive bias. The fabricated output stage of the power amplifier with the feedback through the Wilson current source shows a stable bias current with current variation from 186 mA to 182 mA for the temperature range from 25 degrees C to 200 degrees C. A bias circuit without the feedback through the Wilson current source is also fabricated for comparison and shows a strong bias current variation over temperature.
Temperature Insensitive PA Bias Circuit With Digital Control Interface Using InGaP/GaAs HBT Technology
(2015)
Chang, Wei-Ling
;
Meng, Chinchun
;
Wong, Shyh-Chyi
;
Chien, Hwey
;
Huang, Guo-Wei
This paper demonstrates a new temperature insensitive bias circuit using a Wilson current mirror for the InGaP/GaAs HBT power amplifier. The Wilson current mirror has a high impedance node for connecting an on/off digital interface and a stable voltage node for injection of feedback signals to achieve a temperature insensitive bias. The fabricated output stage of the power amplifier with the feedback through the Wilson current source shows a stable bias current with current variation from 186 mA to 182 mA for the temperature range from 25 degrees C to 200 degrees C. A bias circuit without the feedback through the Wilson current source is also fabricated for comparison and shows a strong bias current variation over temperature.
U-Band pHEMT Divide-by-Three ILFD
(2015)
Chang, Wei-Ling
;
Meng, Chinchun
;
Tsung, Kuan-Chang
;
Huang, Guo-Wei
;
電機工程學系
A fully integrated 0.15-mu m AlGaAs/InGaAs pseudomorphic high electron mobility transistor (pHEMT) divide-by-three injection locked frequency divider (ILFD) with Marchand balun is demonstrated in this paper. The Marchand Balun provides broadband and balanced differential signals at millimeter wave frequencies due to the low loss GaAs semi-insulating substrate. The divide-by-three ILFD performs a locking range from 44 GHz to 47 GHz at the supply voltage of 6 V and the core current consumption is 6.24 mA.
V-band Flip-Chip pHEMT Balanced Power Amplifier with CPWG-MS-CPWG Topology and CPWG Lange Couplers
(2017-01-01)
Chang, Wei-Ling
;
Su, Jen-Yi
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Meng, Chinchun
;
Chang, Chia-Hung
;
Huang, Guo-Wei
A V-band balanced two-stage power amplifier MMICs with Lange couplers is demonstrated using 0.15 mu m GaAs pHEMT technology in this paper. A CPWG-MS-CPWG topology with via holes at the transistors as the transition between coplanar waveguide with backside ground (CPWG) and microstrip (MS) is employed for the two-stage amplifier. CPWG is applied to realize the flip-chip transition interface for both input and output ports of the amplifier and inter-stage MS matching has the advantage of small size. The structure parameters of the CPWG Lange coupler and matching network are designed and optimized for power combining. Finally, a 60-GHz balanced two-stage power amplifier using a CPWG-MS-CPWG structure delivers the small signal gain of 18 dB, OP1dB of 12 dBm and P-sat of 15 dBm.
V-band pHEMT Dual-Conversion Down-Converter With Schottky Diode RF Mixer and Analog Gilbert IF Mixer
(2014-01-01)
Chang, Wei-Ling
;
Meng, Chinchun
;
Chang, Chih-Kai
;
Huang, Guo-Wei
;
電機工程學系
A V-band dual-conversion down-converter with the Schottky-diode first conversion mixer and the analog Gilbert second conversion mixer is demonstrated using 0.15-mu m pseudomorphic high electron mobility transistor (pHEMT) technology. The diode mixer based on quarter-wavelength design methodology occupies a reasonable real estate at millimeter-wave frequency while the analog IF mixer has the size advantage at low microwave frequency. A trifilar transformer is employed in the first mixer to have balanced RF/LO/IF signals for the anti-parallel diode-pairs while a Marchand balance converts the RF signal into the balanced one. Analog I/Q Gilbert mixers driven by the poly-phase filter in the LO port achieve precise I/Q IF output. As a result, this work achieves a wideband conversion gain around -1 dB from 54-64 GHz, -5 dBm of IP1dB, and 6 dBm of IIP3.