Browsing by Author "Chang, Wen-Hsu"
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Item type:Item, A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer(2007) ;Chen, Wei-Zen ;Huang, Shih-Hao ;Wu, Guo-Wei ;Liu, Chuan-ChangHuang, Yang-TungThis paper presents the design of a 3.125 Gbps monolithic CMOS optical receiver, integrating a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. The optical receiver is capable of delivering 420 mV(PP) to 50 Omega output load after optical to electrical conversion. High speed operation is achieved by utilizing spatial modulated light (SML) detector and adaptive analog equalizer. Implemented in a 0.18 mu m CMOS technology, the total power dissipation is 175 mW. The chip size is 0.7 mm(2).Item type:Item, High Definition Image Pre-Processing System for Multi-Stripe Satellites' Image Sensors(2012-09-01) ;Chen, Tsan-Jieh ;Chiueh, Herming ;Hsieh, Chih-Cheng ;Yin, ChinChang, Wen-Hsu"High-resolution image sensors play an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing system for one-dimensional multi-strip complementary metal-oxide semiconductor image sensors (CISs.) The proposed system takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11 200 x N high-resolution images for satellites' remote sensing. Using hardware accelerators coupled with versatile microprocessors, the architecture is able to offer processing capability as well as long-term maintainability for space-borne platforms. The details of hardware design to meet real-time requirement are presented. The prototype, which contains four strip CISs and field programmable gate array-based prototyping, was implemented to verify functionality and capability of real-time image acquisition and combination. The implementation results show that it is feasible to integrate the proposed system into a single chip."Item type:Item, Live Demonstration: The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing(2011) ;Chen, Tsan-Jieh ;Weng, Chih-Hui ;Chiueh, Herming ;Hsieh, Chih-ChengYeh, Shang-Futhe live demonstration shows the prototype of image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed final system is discussed in the main paper, which takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation result shows the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.Item type:Item, The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing(2011) ;Chen, Tsan-Jieh ;Weng, Chih-Hui ;Chiueh, Herming ;Hsieh, Chih-ChengYeh, Shang-Fuhigh resolution image combination and processing plays an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed system takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The details of hardware design to meet real-time requirement are given out. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation results show the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.