Browsing by Author "Chao, A"

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Electrostatic discharge protection under pad design for copper-low-K VLSI circuits
(2004-04-01)
Lee, JW
;
Li, YM
;
Chao, A
;
Tang, H
;
友訊交大聯合研發中心
An electrostatic discharge (ESD) under pad structure is proposed and demonstrated for the novel copper-low-K circuit design. By using this approach, the density of both devices and pads could be markedly improved; in a rough estimation, approximately five to twenty percent of the chip area could be saved. Moreover, tests of ESD, latch-up, and bond yield are performed and are found to be better than those of the conventional ones. The designed structure could be considered as a very effective achievement, and this is particularly true for the sub-0.1 mu m circuit with copper-low-K interconnections.