Browsing by Author "Chen, Che-Sheng"

Now showing 1 - 7 of 7

A 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX applications
(2007-01-01)
Chen, Che-Sheng
;
Wuen, Wen-Shen
;
Wen, Kuei-Ann
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This work presents a 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX standard. Because of the high linearity and wide dynamic range requirement in WiMAX applications, the LNA provides triple gain mode for different receiving conditions. The LNA allows to be switched among high gain mode, E W sinking mode, and high linear mode. Without introducing additional inductors in three gain modes, this work is suitable for system integration. The simulation result shows 1.8 dB noise figure can be achieved at high gain mode for small input signal levels. With IMD sinking technique, the input-referred IP3 is about 7.5 dBm for large interferences. For larger input signal levels, the input P1dB at high linear mode is -2.3 dBm.
A 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX applications
(2007-01-01)
Chen, Che-Sheng
;
Wuen, Wen-Shen
;
Wen, Kuei-Ann
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This work presents a 2.5GHz 90nm CMOS triple gain mode LNA for WiMAX standard. Because of the high linearity and wide dynamic range requirement in WiMAX applications, the LNA provides triple gain mode for different receiving conditions. The LNA allows to be switched among high gain mode, E W sinking mode, and high linear mode. Without introducing additional inductors in three gain modes, this work is suitable for system integration. The simulation result shows 1.8 dB noise figure can be achieved at high gain mode for small input signal levels. With IMD sinking technique, the input-referred IP3 is about 7.5 dBm for large interferences. For larger input signal levels, the input P1dB at high linear mode is -2.3 dBm.
A GENERALIZED FOUNDRY CMOS PLATFORM FOR CAPACITIVELY-TRANSDUCED RESONATORS MONOLITHICALLY INTEGRATED WITH AMPLIFIERS
(2010)
Chen, Wen-Chien
;
Chen, Che-Sheng
;
Wen, Kuei-Ann
;
Fan, Long-Sheng
;
Fang, Weileun
A generalized foundry CMOS-MEMS platform suited for integrated micromechanical resonator circuits have been developed for commercial multi-user purpose and demonstrated with a fast turnaround time and a variety of design flexibilities for resonator applications. With this platform, different configurations of capacitively-transduced resonators monolithically integrated with their associated amplifier circuits, spanning frequencies from 500kHz to 14.5MHz, have been realized with resonator Q\'s around 2,000. This platform specifically featured with various configurations of structural materials, different arrangements of mechanical boundary conditions, large transduction area, well-defined anchors, and performance enhancement scaling with IC fabrication technology, offers a variety of flexible design options suited for sensor and RF applications.
A mismatch compensation circuit for CMOS quadrature VCO phase error
(2007)
Lee, Han-Jian
;
Chen, Che-Sheng
;
Wuen, Wen-Shen
;
Wen, Kuei-Ann
;
電子工程學系及電子研究所
This paper presents an analysis of phase errors; in LC quadrature VCO with a common-mode model. A mismatch compensation circuit is proposed to alleviate phase errors due to common-mode transconductance mismatch. With the compensation circuit, quardature phase errors and image rejection ration rate (IRR) are improved about 1.5 degrees and 4.7dB, respectively. The compensation circuit consumes 1.1mW.
A Monolithic CMOS MEMS Accelerometer with Chopper Correlated Double Sampling Readout Circuit
(2011)
Wang, Chun-Kai
;
Chen, Che-Sheng
;
Wen, Kuei-Ann
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A monolithic CMOS MEMS capacitive accelerometer with micropower analog readout circuit is presented in this paper. In order to optimize noise-power performance of accelerometer in limited area, a specification driven MEMS/IC co-design flow is adopted. In analog readout circuit design, the proposed circuit architecture combines chopper stabilization and correlated double sampling to suppress low frequency noise and compensate DC offset. The RMS input referred noise voltage is 9.82 nV/root Hz under 100Hz. The power consumption is 36uW at 100kHz modulation frequency.
A Multi-band Frequency Synthesizer for GSM/DCS/WIMAX/WLAN Applications with Ripple-free Circuit
(2010)
Chen, Po-Heng
;
Chen, Che-Sheng
;
Chou, Mei-Fen
;
Wen, Kuei-Ann
;
電子工程學系及電子研究所
This paper presents a fully integrated multi- band frequency synthesizer implemented in CMOS 0.18 mu m process with ripple-free circuit in a single loop. The synthesizer is designed for GSM/ DCS/WIMAX/WLAN (802.11a/b/g) systems applying to IQ phase based transceivers. The proposed synthesizer with ripple-free circuit can reduce the amplitude of control voltage ripple. The synthesizer performs the suppression of 31.4dB in the spectrum of reference-spur and the peak-to-peak jitter with 74% improvement compared to the conventional single loop synthesizer design.
Analysis for Efficiency Improvement of CMOS Class-E Power Amplifiers with MEMS Inductors
(2009)
Tsou, Wen-An
;
Chen, Che-Sheng
;
Wang, Chun-Kai
;
Chen, Kevin C. J.
;
Wu, Svu-Hsien
This paper presents an analysis and enhancement of efficiency in a class-E power amplifier using MEMS inductors. The M EMS technology is proposed and demonstrated by a prototype inductor. The model of MEMS inductors is created by HFSS simulator and its simulated result has good match with the measured result. Stacked-metal layer inductors in MEMS process are also developed to increase the quality factor. The simulation result of a CMOS class-E PA with MEMS inductors shows that the increased quality factor of inductors by 2 can improve the PA's efficiency by 6%. Furthermore, we present a design methodology for optimizing the PA's efficiency.