Browsing by Author "Chen, Chun-Chi"

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A Novel Nanoinjection Lithography (NInL) Technology and Its Application for 16-nm Node Device Fabrication
(2011-11-01)
Chen, Hou-Yu
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Chen, Chun-Chi
;
Hsueh, Fu-Kuo
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Liu, Jan-Tsai
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Shy, Shyi-Long
For more than 45 years, photon-and electron-sensitive materials have been used to produce pattern-transfer masks in the lithographic manufacturing of integrated circuits. With the semiconductor technology feature size continuing to shrink and the requirements of low-variability and low-cost manufacturing, optical lithography is driven to its limits. In this paper, we report a novel nanoinjection lithography (NInL) technique that employs electron-beam-assisted deposition to form pattern-transfer hard mask in a direct-write deposit approach. By scanning the 4.6-nm-diameter electron beam while injecting a suitable organometallic precursor gas around the location of e-beam and just above the substrate, we form a high-density (pitch: 40 nm) high-uniformity (3-sigma linewidth roughness: 2 nm) hard mask for subsequent etching without using proximity-effect correction techniques. Furthermore, this technique can also directly deposit a metal pattern for interconnect or a dielectric pattern without the need for separate metal or dielectric deposition, photoresist etch-mask, and etching processes. The NInL approach simplifies the hard-mask creation or even metal or dielectric pattern creation process modules from five or tens of steps to only a single step. Therefore, it saves both photomask making and wafer processing costs. In addition, room-temperature NInL deposition of conductor/dielectric materials enables the fabrication of small versatile devices and circuits. For demonstration, we fabricated a functional 16-nm six-transistor static random access memory (SRAM) cell (area: occupying only 0.039 mu m(2)), 43% the size of the smallest previously reported SRAM cell, using the FinFET structure and a dynamic V(dd) regulator approach. The NInL technique offers a new way of exploring low-volume high-value 16-nm complementary metal-oxide-semiconductor (CMOS) devices and circuit designs with minimal additional investment and obtains early access to extreme CMOS scaling.
A Numerical Study of Si-TMD Contact with n/p Type Operation and Interface Barrier Reduction for Sub-5 nm Monolayer MoS2 FET
(2016-01-01)
Tang, Ying-Tsan
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Li, Kai-Shin
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Li, Lain-Jong
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Li, Ming-Yang
;
Lin, Chang-Hsien
An atomic-scale numerical study of Si contact with transition metal dichalcogenides (TMD) semiconductor materials is proposed by first-principles simulation for the first time. The monolayer MoS2 channel can be operated as both of n- and p-type FET by properly doping Si S/D to adjust the TMD channel potential. The gradient MoSx junction of dichalcogenide vacancies enables Si-MoS2 contact resistance lower than 100 Omega-mu m for interface Schottky barrier height reduction. The compact Si-MoS2 interface study can potentially provide monolayer TMD contact design guideline for the sub-5 nm TMD FET fabrication technology.
A Synthesis-Quality-Oriented Depth Refinement Scheme for MPEG Free Viewpoint Television (FTV)
(2009)
Chen, Chun-Chi
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Chen, Yi-Wen
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Yang, Fu-Yao
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Peng, Wen-Hsiao
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資訊工程學系
This paper addresses the problem of refining depth information front the received reference and depth images within the MPEG FT V framework. An analytical model is first developed to approximate the per-pixel synthesis distortion (caused by depth-image compression) as a function of depth-error variances, intensity variations, ground-truth depth and virtual camera locations. We then follow the model to detect unreliable depth pixels by inspecting intensity gradients and to refine their values with a candidate-based block disparity search. Additional side information is transmitted to make both operations robust against compression effects. Experimental results show that our scheme offers an average PSNR improvement of 1.2 dB over MPEG FTV and consistently outperforms the state-of-the-art methods. Moreover, it can remove synthesis artifacts to a great extent, producing a result that is very close in appearance to the ground-truth view image.
An Interframe Prediction Technique Combining Template Matching Prediction and Block-Motion Compensation for High-Efficiency Video Coding
(2013-08-01)
Peng, Wen-Hsiao
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Chen, Chun-Chi
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資訊工程學系
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Department of Computer Science
This paper introduces an interframe prediction technique that combines two motion vectors (MVs) derived respectively from template and block matching for overlapped block motion compensation (OBMC). It has a salient feature of not having to signal the template MV, while achieving a prediction performance close to that of bi-prediction. We begin by studying template matching prediction (TMP) from a theoretical perspective. Based on two signal models, the template MV is shown to approximate the pixel true motion around the template centroid, through which we explain why TMP generally outperforms SKIP prediction but is inferior to block-based motion compensation in terms of prediction performance. We then approach the problem of finding another MV to best complement the template MV from both deterministic and statistical viewpoints, the latter leading to the search of its optimal sampling location in the motion field. The result is a search criterion with OBMC window functions forming a geometry-like motion partitioning when the template area is straddled on the top and to the left of a target block. Generalizations to adaptive template design, multihypothesis prediction and motion merging are made to explore the complexity and performance trade-offs. Extensive experiments based on the HM-6.0 software show that the best of them, in terms of compression performance, achieves 1.7-2.0% BD-rate reductions at a cost of 26% and 39% increases in encoding and decoding times, respectively.
Analog and RF Characteristics of Power FinFET Transistors With Different Drain-Extension Designs
(2018-10-01)
Chen, Bo-Yuan
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Chen, Kun-Ming
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Chiu, Chia-Sung
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Huang, Guo-Wei
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Chen, Hsiu-Chih
Analog and RF characteristics of power FinFET transistors with different drain-extension structures are investigated for microwave integrated circuit applications. The power FinFETs were designed based on the drain-extended MOSFET structure and fabricated using a standard low-voltage FinFET process. Three various drain-extension configurations are demonstrated and compared. With the low-doped drain extension, the breakdown voltage of power FinFETs is higher than 6.5 V for all samples. For standard power devices, where the drain extension is performed with narrow fins, a high drain resistance is inevitable, resulting in high on-resistance and poor analog and RF performances. For devices with wide drain-extension fins (wide drain FinFET) or a planar drain extension (hybrid FinFET), lower drain resistances are obtained owing to the larger extension width. Therefore, the on-resistances of the wide drain and hybrid devices are much lower than that of the standard counterpart. Moreover, these devices with modified drain extensions also exhibit better analog and RF behaviors. The cutoff frequency of power FinFETs is boosted from 30 to 53 GHz when the drain extension is changed from narrow fins to a planar layout. These experimental results indicate that RF power FinFETs with good performance would be realized with the modified drain-extension designs.
BI-PREDICTION COMBINING TEMPLATE AND BLOCK MOTION COMPENSATIONS
(2011)
Lee, Chung-Lin
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Chen, Chun-Chi
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Chen, Yi-Wen
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Wu, Mu-Hsuan
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Wu, Chung-Hao
This paper introduces a bi-prediction scheme with only a motion overhead as for unidirectional prediction. It combines motion vectors found by template and block matchings with the overlapped block motion compensation (OBMC). An optimal window function is designed based on a model-based framework. Additionally, the concept of adaptive motion merging is incorporated to enable a template-matching-free implementation. Three algorithms featuring different performance and complexity trade-offs are implemented using the TMuC-0.9_HM software and tested with the common test conditions. Relative to the anchor, the best of them achieves an average BD-rate saving of 2.2%, with a minimum of 0.2% and a maximum of 4.7%.
Characterization and density control of GaN nanodots on Si (111) by droplet epitaxy using plasma-assisted molecular beam epitaxy
(2014-12-17)
Yu, Ing-Song
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Chang, Chun-Pu
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Yang, Chung-Pei
;
Lin, Chun-Ting
;
Ma, Yuan-Ron
In this report, self-organized GaN nanodots have been grown on Si (111) by droplet epitaxy method, and their density can be controlled from 1.1 x 10(10) to 1.1 x 10(11) cm(-2) by various growth parameters, such as substrate temperatures for Ga droplet formation, the pre-nitridation treatment of Si substrate, the nitridation duration for GaN crystallization, and in situ annealing after GaN formation. Based on the characterization of in situ RHEED, we can observe the surface condition of Si and the formation of GaN nanodots on Si. The surface nitridaiton treatment at 600 degrees C provides a-SiNx layer which makes higher density of GaN nanodots. Crystal GaN nanodots can be observed by the HRTEM. The surface composition of GaN nanodots can be analyzed by SPEM and mu-XPS with a synchrotron x-ray source. We can find GaN nanodots form by droplet epitaxy and then in situ annealing make higher-degree nitridation of GaN nanodots.
Creation of 3D Textured Graphene/Si Schottky Junction Photocathode for Enhanced Photo-Electrochemical Efficiency and Stability
(2019-08-01)
Ku, Che-Kuei
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Wu, Po-Hsieh
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Chung, Cheng-Chu
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Chen, Chun-Chi
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Tsai, Kaijie
This work presents a novel photo-electrochemical architecture based on the 3D pyramid-like graphene/p-Si Schottky junctions. Overcoming the conventional transfer technique by which only planar graphene/Si Schottky junctions are currently available, this work demonstrates the 3D pyramid-like graphene/p-Si Schottky junction photocathode, which greatly enhances light harvesting efficiency and exhibits promising photo-electrochemical performance for hydrogen generation. The formation of 3D pyramid-like graphene/p-Si Schottky junctions exhibits enhanced electrochemical activity and promotes charge separation efficiency compared with the bare pyramid Si surface without graphene. The inherent chemical inertness of graphene significantly improves the operational stability of 3D graphene/p-Si Schottky junction photo-electrochemical cells. The 3D pyramid-like graphene/p-Si Schottky junction photocathode delivers an onset potential of 0.41 V and a saturated photocurrent density of -32.5 mA cm(-2) at 0 V (vs RHE) with excellent stability comparable to values reported for textured or nanostructured p-Si photocathodes coated with ultrathin oxide layers by the conventional atomic layer deposition technique. These results suggest that the formation of graphene/Si Schottky junctions with a 3D architecture is a promising approach to improve the performance and durability of Si-based photo-electrochemical systems for water splitting or solar-to-fuel conversion.
Effect of different gold nanoparticle sizes to build an electrical detection DNA between nanogap electrodes
(2007-05-01)
Chang, Tien-Li
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Lee, Ya-Wei
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Chen, Chun-Chi
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Ko, Fu-Hsiang
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材料科學與工程學系奈米科技碩博班
An experimental study for identifying DNA strands immobilized in the different particle sizes of gold nanoparticle (AuNP) between nanogap electrodes is presented. The nanogap-based electrics chip demonstrates a significant electrical property with a target DNA (DNA) concentration of 10 pM in the different particle sizes of AuNP to be analyzed in order to make the assay useful for an integrated lab-on-a-chip application system. The biochips with nanogap electrodes are fabricated by e-beam lithography (EBL). Different from traditional detection methods including polymerase chain reaction (PCR) based on assays which are expensive and time consuming for DNA strands research. By the method of electrical characterization, a change in measured current through the different particle sizes of AuNP can pave the way for further use in sensitive biomolecule detection study. (c) 2007 Published by Elsevier B.V.
Experimental and theoretical analysis of microjet droplet behavior
(2007-05-01)
Lee, Ya-Wei
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Chang, Tien-Li
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Ko, Fu-Hsiang
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Chang, Shuo-Hung
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Chen, Chun-Chi
A model for predicting fluid flow with forming droplet in a microjet fluidic device is described. The model considers the approach of non-linear autoregressive moving average model with exogenous inputs (NARMAX) to analyze the dynamic flow behavior of droplet that can be helpful to design microjet geometry in bionanotechnology application. The study in microjet controls a droplet size that is arrival at nanoliter volumes. The working fluids in experimental measuring process are the solution of gold nanoparticles and oil acid. This study focuses on a real time for droplet behavior with the variety of pressure in the channel. Based on identifying both time and frequency domain models, the behavior of droplet flow could be analyzed in microfluidic on-chip system. (c) 2007 Published by Elsevier B.V.
Fabrication of Antireflective Sub-Wavelength Structures on Silicon Nitride Using Nano Cluster Mask for Solar Cell Application
(2009-07-01)
Sahoo, Kartika Chandra
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Lin, Men-Ku
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Chang, Edward-Yi
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Lu, Yi-Yao
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Chen, Chun-Chi
We have developed a simple and scalable approach for fabricating sub-wavelength structures (SWS) on silicon nitride by means of self-assembled nickel nanoparticle masks and inductively coupled plasma (ICP) ion etching. Silicon nitride SWS surfaces with diameter of 160-200 nm and a height of 140-150 nm were obtained. A low reflectivity below 1% was observed over wavelength from 590 to 680 nm. Using the measured reflectivity data in PC1D, the solar cell characteristics has been compared for single layer anti-reflection (SLAR) coatings and SWS and a 0.8% improvement in efficiency has been seen.
GaN Layers on Si (111) from Nanocolumns to Nanorods by Plasma-Assisted Molecular Beam Epitaxy
(2015-10)
Yu, Ing-Song
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Liang, Wen-Han
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Yang, Dian-Long
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Yang, Chung-Pei
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Chang, Chun-Pu
In this report, the characterization of GaN layers grown on p-type Si (111) substrate by plasma-assisted molecular beam epitaxy was investigated. For different growth temperatures (750 degrees C, 800 degrees C and 850 degrees C) and N/Ga flux ratios (0.26, 0.46 and 0.92), we can find the GaN layers transition from nanocolumns to nanorods structures. During the epitaxy of GaN, nanocolumns in the thin films with poor crystal quality were obtained for the growth parameters of low substrate temperature or Ga-rich condition. However, the growth at high substrate temperature or N-rich condition formed GaN nanorods structure, and was beneficial to the crystallization of GaN layers with preferential orientation (0001). In the end, the possible growth mechanism of GaN nanocolumns and nanorods was discussed in the letter.
GaN Layers on Si (111) from Nanocolumns to Nanorods by Plasma-Assisted Molecular Beam Epitaxy
(2015-10-01)
Yu, Ing-Song
;
Liang, Wen-Han
;
Yang, Dian-Long
;
Yang, Chung-Pei
;
Chang, Chun-Pu
In this report, the characterization of GaN layers grown on p-type Si (111) substrate by plasma-assisted molecular beam epitaxy was investigated. For different growth temperatures (750 degrees C, 800 degrees C and 850 degrees C) and N/Ga flux ratios (0.26, 0.46 and 0.92), we can find the GaN layers transition from nanocolumns to nanorods structures. During the epitaxy of GaN, nanocolumns in the thin films with poor crystal quality were obtained for the growth parameters of low substrate temperature or Ga-rich condition. However, the growth at high substrate temperature or N-rich condition formed GaN nanorods structure, and was beneficial to the crystallization of GaN layers with preferential orientation (0001). In the end, the possible growth mechanism of GaN nanocolumns and nanorods was discussed in the letter.
Hybrid PEDOT:PSS Silicon Solar Cells with Pencil Rod Structures
(2017-01-01)
Wu, Ruei-Ying
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You, Liang-Chian
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Meng, Hsin-Fei
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Chen, Chun-Chi
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Yu, Peichen
Pencil-shaped nanorods structure were fabricated on hybrid photovoltaic by nanospheres lithography and metalassisted chemical etching, which showed a low weighted reflectance of 7.4% since the modulation of the tapered tip surface morphology helps to enhance the light harvesting and form radial p-n junction area for efficient carrier separation and collection, thereby effectively increased the J(SC) of 34 mA/cm(2). Furthermore, by using the atomic layer deposition of a thin dielectric interface passivation layer, Al2O3, between the Si and PEDOT:PSS layer could improve the VOC of the hybrid solar cells, we successfully achieve a PCE of 13.61% in cells with optimizing the depth of pencil rods.
Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETs
(2014)
Chen, Min-Cheng
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Lin, Chia-Yi
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Li, Kai-Hsin
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Li, Lain-Jong
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Chen, Chang-Hsiao
Stackable 3DFETs such as FinFET using hybrid Si/MoS 2 channels were developed using a fully CMOS-compatible process. Adding several molecular layers (3-16 layers) of the transition-metal dichalcogenide (TMD), MoS2 to Si fin and nanowire resulted in improved (+25%) I-on,I-n of the FinFET and nanowire FET (NWFET). The PFETs also operated effectively and the N/P device V-th are low and matched perfectly. The proposed heterogeneous Si/TMD 3DFETs can be useful in future electronics.
Hybridization sensing by electrical enhancement with nanoparticles in nanogap
(2008-11-01)
Chen, Chun-Chi
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Ko, Fu-Hsiang
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Chang, Edward Yi
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Chang, Feng-Chih
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Kuo, Shiao-Wei
In this work, the monolayer of gold nanoparticles within 72 nm gap has been proposed to function as a DNA sensor. The authors suggest that the nanoparticles in the nanogap could act as hopping sites which amplify the conductance of hybridized DNA strands. The conductance amplification between single strand and hybridized DNAs through gold nanoparticles is observed. Various concentrations of capture and target DNA are discussed for optimal hybridization sensing purpose. With the help of 1 nM capture DNAs, this sensor is able to analyze target DNA sequences at very low concentration of 1 fM. Furthermore, by means of adjusting the denature temperature to 60 degrees C, even single mismatch hybridization could be discriminated.
Intra Line Copy for HEVC Screen Content Coding
(2014)
Chang, Tsui-Shan
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Chen, Chun-Chi
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Liao, Ru-Ling
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Kuo, Che-Wei
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Peng, Wen-Hsiao
This paper presents an intra line copy mode, which introduces a finer-granularity block partitioning structure for the intra copying technique, to further improve the coding efficiency for screen content. This mode first divides a prediction block horizontally or vertically into 1-pixel-wide lines and then operates intra copying line-by-line from the reconstructed pixels in the current frame. It shares some parallels with the notion of string matching widely used for lossless data compression. It, however, is more compliant to the current HEVC design and is parallel-friendly. This paper shall detail its various design issues, including the design of a fast algorithm based on hashing techniques and the impact of search window size on its performance and complexity trade-off Experimental results show that the proposed mode can offer 2.7-12.9% of BD-rate reductions, with 26% increase of encoding runtime while keeping the decoding runtime unchanged, when integrated into the SCM-1.0 test model.
Intra Line Copy for HEVC Screen Content Intra-Picture Prediction
(2017-07-01)
Chen, Chun-Chi
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Peng, Wen-Hsiao
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資訊工程學系
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Department of Computer Science
This paper presents an intra line copy (ILC) technique for HEVC screen content coding. It shares the same origin with two other prominent techniques, intra string copy (ISC) and intra block copy (IBC), in applying the notion of string matching to intra-frame coding. This work combines their merits in one scheme with both good compression performance and high regularity. Specifically, it forms a prediction of a coding block by decomposing it into horizontal or vertical lines of pixels and performing line-based predictions based on previously coded data from the current frame. To address the massive amounts of search operations, our fast search algorithm first searches in the horizontal and vertical directions, then checks line vector candidates from spatial and temporal neighbors, and finally references lines having an identical hash value as the prediction line. The resulting line vectors are further predicted adaptively to minimize their coding overhead. Extensive experiments based on SCM-4.0, which includes IBC as an integral component, show that ILC can provide an additional 4%-7% BD-rate savings when the search area extends to the entire frame and 3%-4% improvements with a restricted local search. Compared with ISC, it achieves comparable performance without all its complications from sequential string parsing.
Metamorphic In(0.53)Ga(0.47)As Metal-Oxide-Semiconductor Structure on a GaAs Substrate with ZrO(2) High-k Dielectrics
(2008-05-01)
Ku, Chien-I
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Chang, Edward Yi
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Hsu, Heng-Tung
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Chen, Chun-Chi
;
Chang, Chia-Yuan
The electrical properties of metamorphic In(0.53)Ga(0.47)As metal-oxide-semiconductor capacitors with a 100-angstrom-thick ZrO(2) layer as high-k dielectrics were investigated. The In(0.53)Ga(0.47)As surface was pretreated by either sulfur passivation or HCl cleaning before the ZrO(2) deposition. Owing to the lower interface-state density after sulfidation, the sulfur-passivated capacitor exhibited better accumulation capacitance and strong inversion at capacitance-voltage measurement than the HCl-cleaned capacitor after post deposition annealing at 350 degrees C. On the basis of material analyses, the capacitors that subjected to underwent sulfur treatment were found to acquire a thin sulfur layer on the interface, which protects their surface from air exposure and prevents performance degradation. [DOI: 10.1143/JJAP.47.3441]
Metamorphic In0.53Ga0.47As Metal-Oxide-Semiconductor Structure on a GaAs Substrate with ZrO2 High-k Dielectrics
(2008-05-01)
Ku, Chien-I
;
Chang, Edward Yi
;
Hsu, Heng-Tung
;
Chen, Chun-Chi
;
Chang, Chia-Yuan
The electrical properties of metamorphic In0.53Ga0.47As metal-oxide-semiconductor capacitors with a 100-angstrom-thick ZrO2 layer as high-k dielectrics were investigated. The In0.53Ga0.47As surface was pretreated by either sulfur passivation or HCl cleaning before the ZrO2 deposition. Owing to the lower interface-state density after sulfidation, the sulfur-passivated capacitor exhibited better accumulation capacitance and strong inversion at capacitance-voltage measurement than the HCl-cleaned capacitor after post deposition annealing at 350 degrees C. On the basis of material analyses, the capacitors that subjected to underwent sulfur treatment were found to acquire a thin sulfur layer on the interface, which protects their surface from air exposure and prevents performance degradation. [DOI: 10.1143/JJAP.47.3441]