Browsing by Author "Chen, Chun-Chieh"

Now showing 1 - 19 of 19

A 1v CMOS low-noise amplifier with inductive resonated for 3.1-10.6GHz UWB wireless receiver
(2007)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
In this paper a low power and low-noise amplifier (LNA) is designed for ultra-wideband (UWB) system. The design consists of a wideband input impedance matching network, two stages common-source amplifier with inductive resonated load and an output buffer measurement purpose; it is fabricated in TSMC 0.18um standard RF CMOS process. The measured UWB LNA gives 12.0dB gain and 8.0GHz 3dB bandwidth (3.0-11.0GHz) while consuming only 7.3mW through a 1.0V supply including the buffer. Over the 3.1-10.6 GHz frequency band, a minimum noise figure of 4.2dB and input return loss lower than -8.7dB have been achieved.
A 1V-2.39MW capacitor-coupling resonated low noise amplifier for 3-5GHz ultra-wideband system
(2007)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
In this paper a high gain, low power, low-noise amplifier (LNA) is designed for ultra-wideband (UWB) system. The design consists of a wideband input impedance matching network, one stage cascodc amplifier with capacitor-coupling resonated load and it is fabricated in UMC 0.18um standard RF CMOS process. The LNA gives 10.3dB gain and 1.8GHz 3dB bandwidth (3.1 - 4.9GHz) while consuming only 2.39mW through a 1.0V supply. Over the 3.1 - 4.9GHz frequency band, a minimum noise figure of 4.5dB and input return loss lower than -5.7dB have been achieved.
A 65-77 GHz low power, meander-type transmission line CMOS low-noise amplifier
(2015-07-10)
Huang, Zhe-Yang
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電機資訊學士班
;
Undergraduate Honors Program of Electrical Engineering and Computer Science
A 65-77 GHz low power, meander-type transmission line CMOS low-noise amplifier for E-band millimetre-wave communication using 90 nm MS/RF CMOS process is demonstrated. The low-noise amplifier consists of multi-stage cascaded common-source amplifiers with optimized noise figure, power gain, and power consumption. The LNA achieves 11.7 dB power gain, 5.5 dB noise figure, and 17.7 mW power consumption. The meander-type transmission line circuit design is adopted to reduce chip area; the total transmission line area in LNA is only 0.024 mm(2).
A CMOS low-noise amplifier with impedance feedback for ultra-wideband wireless receiver system
(2008)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
Jou, Christina F.
In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, a cascoded amplifier with shunt-peaked load, a RLC-impedance feedback loop and an output buffer for measurement purpose. It is fabricated in TSMC 0.18um standard RF CMOS process. The LNA gives 11.5dB maximum power gain between 3.1GHz-5.0GHz while consuming 5.7mW through a 1.8V supply voltage. Over the 3.1GHz-5.0GHz frequency band, the minimum noise figure (NF) is 4.7dB. Input return loss lower than -12.7 dB in all bandwidth have been achieved.
An Inductor-Coupling Resonated CMOS Low Noise Amplifier for 3.1-10.6GHz Ultra-Wideband System
(2009)
Huang, Zhe-Yang
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Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chill
;
Chen, Chia-Min
In this paper, a low power low-noise amplifier (LNA) using inductor-coupling resonated technique is designed for ultra-wideband (UWB) wireless system. The design consists of a wideband input impedance matching network, one stage cascode amplifier with inductor-coupling resonated load, and an output buffer; it was fabricated in TSMC 0.18um standard RF CMOS process. The UWB LNA gives 10.8dB power gain and 9.4GHz 3dB bandwidth (1.2GHz - 10.6GHz) while consuming only 6.2mW through a 1.2V supply, including output buffer. Over the 3.1GHz - 10.6GHz frequency band, a minimum noise figure of 3.9dB and input return loss lower than -5.7dB have been achieved.
CMOS dual-wideband low-noise amplifier in 3.1GHz-4.9GHz and 6.0GHz-10.3GHz for ultra-wideband wireless receiver
(2007)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
In this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver radio system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, a notch filter and an output buffer for measurement purpose. It is simulated in TSMC 0.18um standard RF CMOS process. The LNA gives 13.66dB maximum power gain between 3.0GHz-4.9GHz and 10.34dB maximum power gain between 6.0GHz-10.3GHz while consuming 24.07mW through a 1.8V supply. Over the 3.1GHz-4.9GHz frequency band and the 6.0GHz-10.3GHz, a minimum noise figure is 2.6dB and 3.8dB. Input return loss lower than - 8.31dB in all bandwidth have been achieved.
CMOS low-noise amplifier for mode-C & mode-D MB-OFDM UWB wireless receiver
(2007-01-01)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
This paper presents a low-power low-noise amplifier (LNA) with switching bands for MB-OFDM Group-C and Group-D ultra-wideband wireless radio system. The LNA is designed and implemented in TSMC 0.18um RF CMOS process. Simulation results show that power gain of 12.4dB, input and output matching lower then -8.5dB and -14.5dB, and a minimum NF of 4.0dB can be achieved, while the power consumption is 11.2 mW through 1.8V power supply.
CMOS low-noise amplifier for mode-C & mode-D MB-OFDM UWB wireless receiver
(2007)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
This paper presents a low-power low-noise amplifier (LNA) with switching bands for MB-OFDM Group-C and Group-D ultra-wideband wireless radio system. The LNA is designed and implemented in TSMC 0.18um RF CMOS process. Simulation results show that power gain of 12.4dB, input and output matching lower then -8.5dB and -14.5dB, and a minimum NF of 4.0dB can be achieved, while the power consumption is 11.2 mW through 1.8V power supply.
CMOS low-noise amplifier for mode-C & mode-D MB-OFDM UWB wireless receiver
(2007)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電信工程研究所
This paper presents a low-power low-noise amplifier (LNA) with switching bands for MB-OFDM Group-C and Group-D ultra-wideband wireless radio system. The LNA is designed and implemented in TSMC 0.18um RF CMOS process. Simulation results show that power gain of 12.4dB, input and output matching lower then -8.5dB and -14.5dB, and a minimum NF of 4.0dB can be achieved, while the power consumption is 11.2 mW through 1.8V power supply.
CMOS low-noise amplifier with shunt-peaking load for group 1 similar to 3 MB-OFDM ultra-wideband wireless receiver
(2008)
Huang, Zhe-Yang
;
Huang, Che-Cheng
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
Jou, Christina F.
In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaking load and an output buffer for measurement purpose. It was fabricated in UMC 0.18um standard RF CMOS process. The LNA provides 14.1dB maximum power gain between 2.3GHz-8.0GH while consuming 18.6mW (including buffer) through a 1.8V supply. Over the 3.1GHz-8.0GHz frequency band, a minimum noise figure is 2.0dB. The input return loss is lower than - 7.1dB in the entire bandwidth has also been achieved.
Distributed and scalable sequential pattern mining through stream processing
(2017-11-01)
Chen, Chun-Chieh
;
Shuai, Hong-Han
;
Chen, Ming-Syan
;
電機工程學系
;
Department of Electrical and Computer Engineering
Scalability is a primary issue in existing sequential pattern mining algorithms for dealing with a large amount of data. Previous work, namely sequential pattern mining on the cloud (SPAMC), has already addressed the scalability problem. It supports the MapReduce cloud computing architecture for mining frequent sequential patterns on large datasets. However, this existing algorithm does not address the iterative mining problem, which is the problem that reloading data incur additional costs. Furthermore, it did not study the load balancing problem. To remedy these problems, we devised a powerful sequential pattern mining algorithm, the sequential pattern mining in the cloud-uniform distributed lexical sequence tree algorithm (SPAMC-UDLT), exploiting MapReduce and streaming processes. SPAMC-UDLT dramatically improves overall performance without launching multiple MapReduce rounds and provides perfect load balancing across machines in the cloud. The results show that SPAMC-UDLT can significantly reduce execution time, achieves extremely high scalability, and provides much better load balancing than existing algorithms in the cloud.
Dual-band voltage controlled oscillator with optimized Gm
(2015-04-10)
Huang, Zhe-Yang
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電機資訊學士班
;
Undergraduate Honors Program of Electrical Engineering and Computer Science
A differential VCO with differential push-push frequency doubler for dual-band application is proposed. The dual-band VCO (DB-VCO) adopts the tunable -Gm to optimize the wide tuning start-up condition. The proposed DB-VCO was implemented in 180-nm CMOS process. The DB-VCO provides a fundamental center frequency at 4.476 GHz and a double frequency at 8.985 GHz. A tuning range of fundamental frequency is 1.125 GHz (3.928 GHz-5.053 GHz), and a tuning range of the double frequency is 2.257 GHz (7.856 GHz-10.113 GHz) with maximum control voltage of 1.0 V can be achieved. The phase noise is -96.0 dBc/Hz at 1 MHz offset from center of the DB-VCO fundamental frequency. And the phase noise is -86.4 dBc/Hz at 1 MHz offset from center of the DB-VCO double frequency. The power dissipation of the DB-VCO core is 6.6 mW through 1.0 V supply voltage. The active area is 0.09 mm(2).
Fabrication of fresnel lens by glass molding technique
(2013-03-01)
Huang, Chien-Yao
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Chen, Chun-Chieh
;
Chou, Hsiao-Yu
;
Chou, Chang-Pin
;
機械工程學系
In this paper, we describe the fabrication of a Fresnel lens with a diameter of 15mm by a glass molding technique. Tungsten carbide and K-CSK120 were used as the materials of the mold and lens, respectively. The optimal parameters determined for the molding process included a molding temperature of 560 A degrees C, a molding force of 300 N, a temperature holding time of 180 s, and a cooling rate of 18.5 A degrees C/min.
Fracture of cobalt chrome, fully-coat beaded femoral revision long stem, a clinical outcomes study
(2018-02-01)
Chang, Chih-Hsiang
;
Lin, Po-Chun
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Shih, Cheng-Min
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Chen, Chun-Chieh
;
Hsieh, Pang-Hsin
Background: Femoral bone loss during revision total hip arthroplasty poses a challenging problem. Bypass fixation over the diaphysis has achieved clinical success in cases of proximal femoral bone loss. Fracture of cementless, fully bead-coated femoral stem is an uncommon complication. The purpose of this study is to analyze the patients with and without fracture stem and find out the possible risk factors. Methods: From 2006 to 2012, a total of 251 revision long stems (Zimmer, Warsaw, IN) were implanted. In the same period, 17 broken stems that underwent treatment were included for analysis. Patients' demographic data, pattern of femoral bone loss, stem size, medial calcar support in the proximal region of the stem, and the timing of stem breakage were collected and analyzed. Results: The stem size in patients with a broken stem was smaller (p < 0.001), and medial calcar defect was 12.4% and 100% (p < 0.001), respectively. The bone defect was greater in broken group (p = 0.024). The mean duration between revision surgery and stem breakage was 58.07 +/- 36.98 months. Smaller stem size, greater bone defect, and inadequate medial calcar bone support were major risk factors for stem breakage. Conclusions: Bypass fixation in the distal diaphysis with a long stem prosthesis without adequate bone support over medial calcar area may cause stress concentration in the long stem and a fatigue fracture. Use of a smaller prosthesis is the major risk of stem broken. It is essential to repair the proximal femoral bone deficiency and implant selection for better metaphyseal engagement to prevent further stem complications.
Genetic polymorphism of catechol-O-methyltransferase modulates the association of green tea consumption and lung cancer
(2019-07-01)
Lai, Chung-Yu
;
Kerr, Chih-Ling
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Huang, Chia-Chen
;
Chen, Chun-Chieh
;
Tsai, Chin-Hung
Tea polyphenols are strong antioxidants, which can be rapidly O-methylated by catechol-O-methyltransferase (COMT). Thus, it is possible that the genetic polymorphism of COMT can modulate the association of green tea consumption and lung cancer. Here, we designed a case-control study to evaluate the combined effect of green tea consumption and COMT genotypes on the risk of lung cancer. A total of 237 lung cancer patients and 474 healthy controls were recruited. Questionnaires were administered to obtain demographic data, smoking status, green tea consumption, fruits and vegetables intake, exposure to cooking fumes, and family history of lung cancer. Genotypes for COMT were identified by PCR. Smoking, green tea consumption, exposure to cooking fumes, and family history of lung cancer were associated with the development of lung cancer. When green tea drinkers carrying COMT HL/LL genotypes were selected as the reference group, drinkers carrying the COMT HH genotype had a higher risk for the development of lung cancer (odds ratio: 1.97, 95% confidence interval: 0.99-3.91). Among the current and ever smokers, the elevated risk for lung cancer was more apparent in green tea drinkers carrying the COMT HH genotype compared with green tea drinkers carrying COMT HL/LL genotypes (odds ratio: 5.84, 95% confidence interval: 1.75-19.45). Green tea drinkers with greater activity of the COMT genotype, whereby polyphenols are effectively excluded, will gain fewer protective benefits against lung cancer development.
Highly Parallel Sequential Pattern Mining on a Heterogeneous Platform
(2018-01-01)
Hsieh, Yu-Heng
;
Chen, Chun-Chieh
;
Shuai, Hong-Han
;
Chen, Ming-Syan
;
電子工程學系及電子研究所
Sequential pattern mining can be applied to various fields such as disease prediction and stock analysis. Many algorithms have been proposed for sequential pattern mining, together with acceleration methods. In this paper, we show that a heterogeneous platform with CPU and GPU is more suitable for sequential pattern mining than traditional CPU-based approaches since the support counting process is inherently succinct and repetitive. Therefore, we propose the PArallel SequenTial pAttern mining algorithm, referred to as PASTA, to accelerate sequential pattern mining by combining the merits of CPU and GPU computing. Explicitly, PASTA adopts the vertical bitmap representation of database to exploits the GPU parallelism. In addition, a pipeline strategy is proposed to ensure that both CPU and GPU on the heterogeneous platform operate concurrently to fully utilize the computing power of the platform. Furthermore, we develop a swapping scheme to mitigate the limited memory problem of the GPU hardware without decreasing the performance. Finally, comprehensive experiments are conducted to analyze PASTA with different baselines. The experiments show that PASTA outperforms the state-of-the-art algorithms by orders of magnitude on both real and synthetic datasets.
Low-noise amplifier with narrow-band and wide-band input impedance matching design
(2015-07-01)
Huang, Zhe-Yang
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
資訊工程學系
;
Department of Computer Science
A low-noise amplifier (LNA) with cascode structure and shunt-peaking load is presented in this article. Both Narrow-band input impedance and wide-band input impedance LNAs were implemented in 0.18m CMOS process. Maximum power gain of the narrow-band input impedance LNA is 19.3dB; maximum power gain of the wide-band input impedance LNA is 15.3dB. Minimum noise figure of the narrow-band input impedance LNA is 3.1dB; minimum noise figure of the wide-band input impedance LNA is 3.0dB. Power consumptions including buffers are 24.5 and 25.6mW, respectively.
Low-power CMOS voltage-controlled oscillator with voltage-controlled inductor for V-band wireless personal area network communication systems
(2015-12-10)
Huang, Zhe-Yang
;
Chen, Chun-Chieh
;
Hung, Chung-Chih
;
電機資訊學士班
;
電子工程學系及電子研究所
A low-power voltage-controlled oscillator (VCO) with voltage-controlled inductor for V-band wireless personal area network communication systems is presented in this study. The proposed VCO with a voltage-controlled inductor provides a centre frequency of 45.62 GHz and was implemented in a 90 nm RF-CMOS process. A tuning range of 1.28 GHz (44.98-46.26 GHz) with maximum control voltage of 1.0 V can be achieved. The phase noise is -92.8 dBc/Hz at 1 MHz offset frequency. The VCO core consumes 5.8 mW through a 1.0 V supply voltage and the active area is 0.13 mm(2). The calculated figure-of-merit is -178.3.
Multi-stage low-noise amplifier with LC-tank load for ultra-wideband wireless receiver
(2007)
Chen, Chun-Chieh
;
Huang, Zhe-Yang
;
Wang, Yen-Chun
;
Chiang, Pei-Yuan
;
Huang, Che-Cheng
A multi-stage low-noise amplifier (LNA) with LC-tank load to extend the bandwidth is designed for ultra-wideband (UWB) wireless receiver. The design consists of three LC-tank cascode amplifier and one output buffer and is implemented in 0.18um RF CMOS process. The LNA gives 14.5dB gain and 7.2GHz 3dB bandwidth (3.1 - 10.3GHz) while consuming 22.8mW through a 1.5V supply. Over the 3.1GHz - 10.3GHz frequency band, a minimum noise figure of 2.6dB and input return loss lower than -8.8dB have been achieved.