Browsing by Author "Chen, DC"

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A physically-based built-in Spice Poly-Si TFT model for circuit simulation and reliability evaluation
(1996)
Chung, SS
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Chen, DC
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Cheng, CT
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Yeh, CF
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交大名義發表
A Poly-Si TFT model for circuit simulation in Spice is presented, combined with a device degradation model for the first time to evaluate the circuit reliability. Both I-V and C-V models for the whole device operating regime have been developed. In the I-V model, emphasis has been taken to derive the mobility degradation induced by the grain boundary potantial barrier height and trap density. The small geometry effect, off-state current and the parasitic BJT effect are also considered in the model. Good agreements between modeled and experimental data were achieved. To evaluate the circuit reliability after electrical stress, the device reliability model has also been developed. Finally, simulation a 27-stage ring oscillator has been demonstrated, which shows delay time of about 1 nsec per stage.
Current detection of vortex motion in patterned S-shape wires with constrictions
(2006-04-15)
Chen, YC
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Yao, YD
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Lee, SF
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Lin, YA
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Chen, DC
The current-driven effect on the vortex domain wall in a series-connected permalloy S-shape patterns was investigated. When a domain wall is initially formed in the wire section, in contrast to the ac result, applying a low dc current (J similar to 10(5) A/cm(2)) will break the degeneracy of the switching energy in different connected sections. Moreover, three kinds of effects on vortex states are observed by applying a high dc current (J similar to 10(7) A/cm(2)). The current applied slightly below the original switching field will drive vortices to constrictions while the current applied far below the original switching field will only perturb the vortex to another stable state. At the fields slightly over the original switching field, the domain walls are initially trapped at constrictions, injecting current will cause both the depinning and deformation of vortices. (C) 2006 American Institute of Physics.
Current-assisted magnetization switching in submicron permalloy S-shape wires with narrow junctions
(2005-05-15)
Chen, YC
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Lin, YA
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Chen, DC
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Yao, YD
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Lee, SF
We report the results of the current-assisted magnetization switching in submicron permalloy S-shape wires with narrow junctions (or notches). Domain walls were initially formed and pinned in the vicinity of the notches. Two distinct behaviors are observed in the current-assisted magnetization reversal process. When the applied field is near switching field (Delta H < 7 Oe), the injected current directly switched the wire magnetization, and the needed critical current varied linearly and significantly with the field intensity. In contrast, when the field is relatively far from the switching field (Delta H > 7 Oe), the current only moves the domain wall to a local stable state, and the critical current varied slightly with the field. Moreover, two resistance jumps during current scanning are observed in the cases with magnetization reversals. These results reveal that the current driven effect is closely related to the initial domain states, and are explained by a theoretical model based on spin transfer effect. (c) 2005 American Institute of Physics.
Highly reliable liquid-phase deposited SiO2 with nitrous oxide plasma post-treatment for low temperature processed poly-Si TFT's
(1998)
Yeh, CF
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Chen, DC
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Lu, CY
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Liu, C
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Lee, ST
Low temperature (similar to 300 degrees C) N2O plasma annealing for liquid-phase deposited (LPD) gate oxide has been proposed for the first time. Physicochemical and electrical characterizations show that the N2O-treated LPD-SiO2 improves breakdown field, interface state density, and Si-rich phenomenon. This novel technology has been also successfully applied to LTP poly-Si TFT's, which reveal excellent characteristics and reliability. It is believed that the N2O plasma post-treatment not only improves the oxide quality, but also passivates the trap states in poly-Si channel.
Magnetic switching and reversal process in a tip ring structure
(2004-06-01)
Liou, Y
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Chen, DC
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Yu, C
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Chen, JS
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Lee, SF
Patterned Permalloy submicron-size structures have been fabricated by e-beam lithography in the shape of a ring with a tip. A tip was intentionally added into the ring as a geometrical defect to interrupt the continuity of the magnetization, which aligns along the ring, in order to pin the domain wall. Magnetic switching and reversal process have been measured by the magnetoresistance measurement. The switching field about 260 Oe was obtained. At the remanent state, there was a 0.21% difference in the magnetoresistance between the angles of 90degrees and 0degrees that was equivalent to the domain wall magnetoresistance. By applying an external field, the domain wall moved along the ring under a lower field (100 Oe), which is smaller than the switching field. A drop (0.24%) in the resistance between the angle of 70degrees-120degrees has been observed that means the domain wall was moving into the voltage measuring region during the rotation. (C) 2004 American Institute of Physics.
Measurement of electromigration parameters of lead-free SnAg3.5 solder using U-groove lines
(2005-10-01)
Hsu, YC
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Chen, DC
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Liu, PC
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Chen, C
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材料科學與工程學系
Measurement of electromigration parameters in the lead-free solder SnAg3.5 was carried out by utilizing U-groove solder lines and atomic force microscopy in the temperature range of 100-150 degrees C. The drift velocity was measured, and the threshold current densities of the SnAg3.5 solder were estimated to be 4.4 x 10(4) A/cm(2) at 100 degrees C, 3.3 x 10(4) A/cm(2) at 125 degrees C, and 5.7 x 10(3) A/cm(2) at 150 degrees C. These values represent the maximum current densities that the SnAg3.5 solder can carry without electromigration damage at the three stressing temperatures. The critical products for the SnAg3.5 solder were estimated to be 462 A/cm at 100 degrees C, 346 A/cm at 125 degrees C, and 60 A/cm at 150 degrees C. In addition, the electromigration activation energy was determined to be 0.55 eV in the temperature range of 100-150 degrees C. These values are very fundamental for current carrying capability and mean-time-to-failure measurement for solder bumps. This technique enables the direct measurement of electromigration parameters of solder materials.
Vortex domain wall depinning by polarized current in submicron half-ring wires
(2006-04-15)
Chen, YS
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Cheng, KW
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Yu, C
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Lee, SF
;
Chen, DC
Domain wall pinning force in the junctions (corners), with different shapes of square, semicircle, or triangle, of half-ring in-series wires is considered to study the current injection induced wall movements. This geometry has less thermal activation at the region of domain wall nucleation in contrast to notch structures. The wires with square corners have the largest domain pinning force to resist polarized current-induced magnetization reversal, judging from the largest slope in the current-field dependence (Delta I/Delta H=0.274). (C) 2006 American Institute of Physics.