Browsing by Author "Chen, Henry J. H."

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Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch Technology
(2015)
Lee, Yao-Jen
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Hou, Fu-Ju
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Chuang, Shang-Shiun
;
Hsueh, Fu-Kuo
;
Kao, Kuo-Hsing
We propose a feasible pathway to scale the Ge MOSFET technology by using a novel diamond-shaped Ge and Ge0.9Si0.1 gate-all-around (GAA) nanowire (NW) FETs with four {111} facets. The device fabrication requires only simple top-down dry etching and blanket Ge epitaxy techniques readily available in mass production. The proposed dry etching process involves three isotropic/anisotropic etching steps with different Cl-2/HBr ratios for forming the suspended diamond-shaped channel. Taking advantages of the GAA configuration, favorable carrier mobility of the {111} surface, nearly defect-free suspended channel, and improved dopant activation by incorporating Si, nFET and pFET with excellent performance have been demonstrated, including an I-on/I-off ratio exceeding 10(8), the highest ever reported for Ge-based pFETs.
Folded dual-band (2.4/5.2GHz) antenna fabricated on silicon suspended parylene membrane
(2005)
Chen, I-Yu
;
Huang, Chuen-Uan
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Chen, Henry J. H.
;
Jou, Christina F.
;
Huang, Star Ruey-Shing
A novel and simple kind of dual-band monopole MEMS membrane antenna fabricated on silicon suspended parylene membrane is presented. This parylene membrane is a flexible polymer film and it can be coated on various shapes and surfaces of materials or even peeled off from materials as thin flexible substrate. Because of its low deposition processing temperature, it is possible to be fabricated on CMOS circuits post process with MEMS technology. This folded monopole parylene membrane antenna provides two resonant paths of different lengths to achieve the desired dual-band (2.4/5.2GHz) operation for Bluetooth and WLAN application. The low cost, easy fabrication, easily stickable and peel-off flexible properties of this parylene membrane makes it very attractive and convenient in any wireless portable devices such as mobile phone, RFID tag, Bluetooth and WLAN devices, even any wearable clothes... etc.
Ultra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS Devices
(2017-01-01)
Chuang, Shang-Shiun
;
Cho, Ta-Chun
;
Sung, Po-Jung
;
Kao, Kuo-Hsing
;
Chen, Henry J. H.
We focused on the damage-free monolayer doping (MLD) method starting from a chemical reaction of molecules on Si and Ge surfaces and applied it to 3D MOSFET device fabrication. MLD methods were verified by different material analysis, such as XPS and Raman spectroscopy. For a Si-based FinFET structure, compared to the device with ion implantation, the short channel effect of source and drain (SD) extension regions formed by MLD are improved. The shallower SD extension regions formed by low-temperature microwave annealing (MWA) are expected to the device showing better electrical properties than deeper ones formed by RTA. In addition, formation of the n- and p-type doping in Ge by MLD was also investigated. Even after annealing at 800 degrees C for 300 sec by RTA, the p-type doping still exhibits a low surface doping concentration due to the low diffusion coefficient of B in Ge and surface diffusion limitations at the MLD/Ge interface. By using a combination of RTA and CO2 laser spike annealing (LSA), MLD n-type doping in Ge are formed with junction depths of approximate to 15 nm, and peak concentration of approximate to 6 x 10(20) atoms/cm(3). The dopant activation for the MLD-doped channels of Ge junctionless FinFETs (JLFinFETs) is improved after the additional CO2 LSA. (C) 2017 The Electrochemical Society. All rights reserved.