Browsing by Author "Chen, Hong-Yu"

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Design and Optimization Methodology for 3D RRAM Arrays
(2013)
Deng, Yexin
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Chen, Hong-Yu
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Gao, Bin
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Yu, Shimeng
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Wu, Shih-Chieh
3D RRAM arrays are studied at the device-and architecture-levels. The memory cell performance for a horizontal cross-point is shown experimentally to be essentially comparable to vertical pillar-around geometry. Array performances (read/write, energy, and speed) of different 3D architectures are investigated by SPICE simulation, showing horizontal stacked RRAM is superior but suffers from higher bit cost. Adopting a bi-layer pillar electrode structure is demonstrated to enlarge the array size in 3D vertical RRAM. Design guidelines are proposed for the 3D VRRAM: it shows that increasing the number of stacks of VRRAM while keeping the total bits the same, as well as scaling of feature size (F), are critical for reducing RC delay and energy consumption.
Improved Multi-level Control of RRAM Using Pulse-Train Programming
(2014-01-01)
Zhao, Liang
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Chen, Hong-Yu
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Wu, Shih-Chieh
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Jiang, Zizhen
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Yu, Shimeng
Multi-level cell (MLC) capability in RRAM is attractive for reducing the cost per bit. Based on the filamentary switching mechanisms, we propose a pulse-train programming scheme to achieve reliable and uniform MLC controls without the need of any read-verification operation. By applying the novel scheme to a 3 bit/cell RRAM device, the uniformity of resistance distribution can be improved up to 80%.
Lens-less bending and concentration of light by volume hologram
(2015-12-01)
Hsieh, Mei-Li
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Peng, Cheng-Te
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Chen, Hong-Yu
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Lin, Shawn-Yu
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光電工程學系
In this paper, a new approach is proposed to realize a lens-less and 90 degrees light-bending by a volume-holographic element, consisting of 3D sub-wavelength index-gratings throughout the sample. In this approach, a top incident plane-wave is diffracted by 90 degrees and guided into a planar volume hologram. Conversely, a side-incident light may be guided and diffracted out of the top sample surface. The diffraction-efficiency eta of light was studied in real-time during light-exposure and also in the dark after exposure to observe "dark-enhancement". It is shown that 90 degrees light-bending at normal incidence can be achieved with a high efficiency, eta similar to 70%, and a small angular-tolerance, Delta theta=0.02 degrees. It is further shown, as a proof-of-concept, that a 5 degrees cylindrical-wave top-incident beam may be used to improve angular tolerance to Delta theta=5 degrees, but with a reduced efficiency of eta similar to 0.80%. Crown Copyright (C) 2015 Published by Elsevier B.V. All rights reserved.
Optimization of light diffraction efficiency and its enhancement from a doped-PMMA volume holographic material
(2013-11-01)
Hsieh, Mei-Li
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Chen, Wei-Cheng
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Chen, Hong-Yu
;
Lin, Shawn-Yu
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光電工程學系
In this paper, we study the diffraction efficiency from the volume gratings in holographic materials, PQJ PMMA, and their efficiency-enhancement in an optically dark environment (dark enhancement). We show that the diffraction efficiency is increased in real-time by light-exposure and then by a slow diffusion process in the dark after light-exposure. We observe strong correlations between the efficiency, the light-exposure energy and the dark-enhancement. Furthermore, we establish an optimum condition for light-exposure and dark-enhancement. Accordingly, we simultaneously achieve the best diffraction-efficiency of 82% for a 2 mm thick PQ/PMMA and an efficiency-enhancement of 3.1 times after exposure, approaching the theoretical limit of 4 times. Published by Elsevier B.V.
Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication
(2017-12-01)
Chen, Hong-Yu
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Brivio, Stefano
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Chang, Che-Chia
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Frascaroli, Jacopo
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Hou, Tuo-Hung
Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.