Browsing by Author "Chen, Hung-Chi"

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A Comparison Study of Boost and Buck-boost Power Factor Corrector for Ultra-wide Input Voltage Range Applications
(2014-01-01)
Yu, Sheng-Yang
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Chen, Hung-Chi
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電機工程學系
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Department of Electrical and Computer Engineering
Due to the potential need for ultra-wide input voltage range power factor correction (PFC) circuit, one may consider Buck-boost converter as a PFC circuit (PFC Buck-boost) instead of Boost converter (PFC Boost). The voltage step-up/down freedom of Buck-boost converter allows a lower output voltage and smaller duty cycle compared to Boost converter. In addition, indirect input/output path limits the startup inrush current of PFC Buck-boost. Unlike PFC Boost, PFC Buck-boost doesn't need an inrush current limiting circuit, which allows a lower cost PFC circuit by applying Buck-boost converter. This paper conducts a comparison study of PFC Boost and PFC Buck-boost for a two stage system (PFC stage in cascade with an isolated DC-DC converter). Transient mode PFC is selected in this study for low power applications. Two 100W power supply prototypes are made for this comparison. The results show that PFC Buck-boost is able to provide a higher efficiency than PFC Boost under low input voltage with fewer power stage circuit components.
A Discontinuous Space Vector PWM Algorithm in abc Reference Frame for Multilevel Three-Phase Cascaded H-Bridge Voltage Source Inverters
(2017-11-01)
Hu, Jwu-Sheng
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Lin, Jau-Nan
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Chen, Hung-Chi
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電機工程學系
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Department of Electrical and Computer Engineering
Previous space vector pulse-width modulation (SVPWM) methods for a multilevel three-phase voltage source inverter (VSI) have the problems including the computational complexity to identify the location of the reference voltage vector, the memory requirements of switching states and corresponding duty ratios, or no generalized switching pulse durations of switches. These problems are related to the level number, and they become critical at a high level number. In this paper, a discontinuous SVPWM algorithm in the abc reference frame is first proposed for a multilevel three-phase cascaded H-bridge (CHB) VSI. The L-level three-phase SVPWM problem is solved based on the two-level three-phase SVPWM one. Thus, the computational complexity to determine the nearest three switching states and corresponding duty ratios is independent of the level number. Furthermore, the proposed algorithm provides a systematic approach to calculate the switching pulse durations for a multilevel three-phase CHB VSI, and the approach can be extended to different multilevel three-phase VSIs. The proposed algorithm has no memory requirement and low computational complexity. It is verified by the simulation and experimental results for a five-level three-phase CHB VSI.
A Novel Control Strategy of Circulating Currents in Parallel Single-Phase Boost Rectifiers
(2012)
Liao, Yi-Hung
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Chen, Hung-Chi
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Cheng, Hsiu-Che
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Lai, Ching-Ming
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交大名義發表
In this paper, a novel circulating current control scheme of paralleled single-phase boost-type full-bridge converters is proposed. The novel circulating current control scheme doesn\'t require any communication between paralleled converters. Simultaneously, the proposed circulating current control scheme improves the performance of the parallel system and reduces the circulating currents which result from the parallel connection. Based on this control scheme, not only input current shaping of each converter is improved, but also current sharing among paralleled converters is achieved. Both simulation and experimental results verified the validity of the proposed circulating current control scheme.
A Novel Control Strategy of Circulating Currents in Paralleled Single-Phase Boost Converters for Micro-Grid Applications
(2013-01-01)
Liao, Yi-Hung
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Ke, Yu-Lung
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Chen, Hung-Chi
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Cheng, Hsiu-Che
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交大名義發表
In this paper, analysis of circulating currents of paralleled single-phase boost converter systems is presented. The DC loop and AC loop circulating currents are clearly explained. In order to eliminate the DC loop circulating currents and reduce switching losses, a simplified PWM strategy is adopted in a paralleled single-phase boost converter. Based on the analysis of circulating currents, common mode circulating current (CMCC) and differential mode circulating current (DMCC) are defined. Then, CMCC and DMCC compensator in a centralized control scheme are proposed to reduce the common-mode and differential-mode circulating currents in the parallel system operated in both rectifier mode and inverter mode for micro-grid applications. Some simulation results are carried out to verify the validity of the proposed control scheme. In addition, a prototype system is constructed to facilitate the theoretical results as verification. From simulation and experimental results, the proposed control scheme can indeed reduce the circulating currents under equal and/or different power rating condition in the parallel system.
A Novel Control Strategy of Circulating Currents in Paralleled Single-Phase Boost Converters With Different Power Sharing for Microgrid Applications
(2014-03-01)
Liao, Yi-Hung
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Chen, Hung-Chi
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Cheng, Hsiu-Che
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Ke, Yu-Lung
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Li, Yi-Ta
In this paper, analysis of circulating currents of paralleled single-phase boost converter systems is presented. The dc loop and ac loop circulating currents are clearly explained. In order to eliminate the dc loop circulating currents and reduce switching losses, a simplified pulsewidth modulation strategy is adopted in a paralleled single-phase boost converter. Based on the analysis of circulating currents, common-mode circulating current (CMCC) and differential-mode circulating current (DMCC) are defined. Then, CMCC and DMCC compensators are proposed in a centralized control scheme to reduce the common-mode and differential-mode circulating currents in a parallel system operated in both rectifier and inverter modes with different power sharing for microgrid applications. Converter-paralleled system stability analysis is also presented. Finally, a prototype system is constructed to facilitate the theoretical results as verification. From the experimental results, the proposed control scheme can indeed reduce the circulating currents under equal and/or different power rating conditions in the parallel system.
A quantitative evaluation with an innovative wireless bio-impedance device to check improvement of limb lymphedema after receiving two-site vascularized lymph node transfer simultaneously in a patient
(2018-03-01)
Chang, Chang-Cheng
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Su, Chun-Lin
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Xu, Dai-Ru
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Lin, Bor-Shyh
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Chen, Hung-Chi
A Simple Control Strategy Extending Intrinsic Current Balancing Characteristics to Achieve a Full Operating Range for Interleaved Voltage-Doubler Boost DC-DC Converters
(2020-01-01)
Li, Chung-Yi
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Chen, Tien-Hung
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Chen, Hung-Chi
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電機工程學系
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電控工程研究所
The interleaved voltage-doubler boost converter strategy exhibits a very good performance, namely, in a low conduction loss, an acceptable switch stress, a fast transient response, and a very high power density. However, the bottleneck for application in the interleaved topology lies in the limit of operating duty ratio. In this article, an intrinsic current-balancing control method to achieve full operating range in duty ratio is proposed, and it can be easily implemented by including a voltage limiter to the conventional control configuration. With this novel design, both voltage-doubler and the current-balancing characteristics can be achieved within full range in duty cycle without any current sensor. The proposed method is implemented in a field programmable gate array chip. The provided simulations and experimental results validate the proposed method.
Acceleration Harmonics Reduction for Electrodynamic Shaker Fed by Cascaded H-Bridge Inverter
(2012)
Chen, Hung-Chi
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Liao, Jhen-Yu
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電機資訊學士班
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Undergraduate Honors Program of Electrical Engineering and Computer Science
For a permanent magnet electrodynamic shaker (PMEDS), an LC filter is frequently connected in series to filter out the high-frequency voltage to avoid high-frequency harmonic acceleration of the PMEDS table. This paper use a simple current control loop to avoid high-frequency harmonic acceleration instead of an LC filter which may have large size and heavy weight in high-power applications. A cascade H-bridge inverter is used in this paper to lower the output voltage harmonics and current ripple. According to the provided simulated and experimental results, it can be found that the proposed current control can improve the acceleration of the PMEDS.
Active Capacitor Voltage Balancing Control for Three-Level Flying Capacitor Boost Converter
(2018-01-01)
Chen, Hung-Chi
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Lu, Che-Yu
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Lien, Wei-Hsiang
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電機工程學系
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電控工程研究所
The average-behavior circuit model of three-level flying capacitor boost converter (FCBC) is presented in this paper. The small-signal transfer functions of three-level FCBC are first obtained that are including two control signals as the input signals and including the output voltage and the capacitor voltage as the output signals. Besides, the voltage regulating controller is a proportional-integral (PI-type) controller and the voltage balancing controller is a proportional (P-type) controller. Based on the small-signal analysis of three-level FCBC, the closed-loop transfer functions can be obtained and the controller parameters can be selected as well. All the algorithms are implemented in a Field Programmable Gate Array (FPGA) chip. The simulation and experimental results validate the capacitor voltage balancing capability of the proposed method.
Active Capacitor Voltage Balancing Control for Three-Level Flying Capacitor Boost Converter Based on Average-Behavior Circuit Model
(2019-03-01)
Chen, Hung-Chi
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Lu, Che-Yu
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Lien, Wei-Hsiang
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Chen, Tien-Hung
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電機工程學系
This paper proposes an active voltage balancing control strategy for the three-level flying capacitor boost converter (FCBC). The average-behavior circuit model for the three-level FCBC is studied, and then, the relationship of control to output signals is presented to analyze the coupling effects between the capacitor voltage balancing and the output voltage regulation. In addition, classical proportional and proportional-integral controllers are used for the voltage balancing control loop and the output voltage regulating control loop, respectively. Finally, the proposed control algorithm is implemented in a commercial field programmable gate array platform. Some simulation and experimental results demonstrate that the proposed active control strategy is able to achieve the desired effects for the steady-state and transient responses.
An Isolated Full-Bridge DC-DC Converter With 1-MHz Bidirectional Communication Channel
(2011-09-01)
Yang, Ru-Shiuan
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Chang, Lon-Kou
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Chen, Hung-Chi
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電機工程學系
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Department of Electrical and Computer Engineering
This paper presents a novel isolated full-bridge dc/dc converter with bidirectional communication capability. The transformer in the proposed converter is utilized as an isolation interface for transferring both energy and data. Power delivery and forward data transfer are conducted simultaneously by modifying the full-bridge switching phase. Backward data transfer is realized by manipulating the amplitude of the resonant signal through modulating the impedance of the resonant tank at the secondary side of the transformer. Finally, the operation principle of the proposed converter was verified on a 900-mW prototype operating at 1 MHz from a 12-V dc input.
Analysis and Design of a Single-Stage Parallel AC-to-DC Converter
(2009-12-01)
Li, Heng-Yi
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Chen, Hung-Chi
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Chang, Lon-Kou
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電控工程研究所
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Institute of Electrical and Control Engineering
In this paper, a single-stage (S(2)) parallel ac-to-dc converter based on single-switch two-output boost-flyback converter is presented. The converter contains two semistages. One is the boost flyback semistage, which transfers partial input power transferred to load directly through one power flow path and has excellent self-power factor correction property when operating in discontinuous conduction mode even though the boost output is close to the peak value of the line voltage. The other one is the flyback dc-to-dc (dc/dc) semistage that provides the output regulation on another parallel power flow path. With this design, the power conversion efficiency is improved and the current stress of control switch is reduced. Furthermore, the calculation process of power distribution and bulk capacitor voltage, design equations, and design procedure for key parameters are also presented. By following the procedure, an 80 W prototype converter has been built and tested. The experimental results show that the measured line harmonic current at the worst condition complies with the IEC61000-3-2 class D limits, the maximum bulk capacitor voltage is about 415.4 V, and the maximum efficiency is about 85.8%. Hence, the proposed S(2) converter is suitable for universal input usage.
Application of Multi-Dimensional Feedback Quantized Modulation to Inverter-Fed Two Cascaded Electrodynamic Shakers
(2015)
Chen, Hung-Chi
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Lu, Che-Yu
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Yao, Cheng-Chiang
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電機學院
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College of Electrical and Computer Engineering
In this paper, two cascaded electrodynamic shakers are supplied by the three-leg inverter. The conventional comparator-based pulse width modulation (MAI) has limited output voltage region due to the common leg. To enlarge the output voltage region and improve the inverter efficiency, the novel multi-dimensional feedback quantized modulation (MDFQM) is used. All the control algorithms are implemented in FPGA, and the results are provided to verify the proposed method. The results of the conventional PWM method are also provided for comparison.
Average Current Method to Detect Open-Winding Fault of Three-Phase Permanent Magnet Synchronous Motors
(2016)
Chen, Hung-Chi
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Wu, Zhi-Xuan
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Li, Chung-Yi
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資訊工程學系
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電機學院
In this paper, the average current method is proposed to detect the open-winding fault of three-phase permanent magnet synchronous motors (PMSMs). The characteristics and operational regions are studied. All the methods are implemented in FPGA-based system. The simulation and experimental results are provided to demonstrate the proposed method.
BDCM Sensorless Control for Twelve-Step Square-Wave PWM
(2009)
Chen, Hung-Chi
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Huang, Chih-Kai
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Tsai, Tzu-Yang
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
After studying the development of BDCM sensorless control with six-step square-wave PWM (SWPWM) and six-step back-EMF detecting scheme (BEDS), the BDCM sensorless control with twelve-step SWPWM and twelve-step BEDS had been proposed and implemented in this paper. The proposed twelve-step BEDS generates the twelve commutation instants from six back-EMF zero-crossings during each cycle where the six-step BEDS generates the six commutation instants from six back-EMF zero-crossings. Since the analysis of six-step BEDS is helpful to develop the twelve-step BEDS, this paper studies the six-step SWPWM and six-step BEDS first and explains why some specific six-step SWPWM type is always used in the six-step BDCM sensorless control. Then, we obtain the specific twelve-step SWPWM types and develop the proposed twelve-step BEDS. From the simulated and experimental results, BDCM sensorless control with twelve-step SWPWM shows less current harmonics than that with six-step SWPWM.
Bidirectional Current Sensorless Control for the Full-Bridge AC/DC Converter With Considering Both Inductor Resistance and Conduction Voltages
(2014-04-01)
Chen, Hung-Chi
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Liao, Jhen-Yu
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電機資訊學士班
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Undergraduate Honors Program of Electrical Engineering and Computer Science
The full-bridge converter is often connected between the ac grid and the dc bus. In the conventional multiloop control, the inner current control loop shapes the ac-side current waveform, and the outer voltage control loop regulates the dc-bus voltage. In this paper, the single-loop bidirectional current sensorless control (BCSC) for the full-bridge ac/dc converter with considering both the inductor resistance and conduction voltage is first proposed. The average-value behavior of the full-bridge ac/dc converter is analyzed and it is simplified to an equivalent single-switch model. Based on this developed equivalent model, BCSC is designed and implemented in the FPGA-based system. There is only voltage control loop in the proposed BCSC (i.e., no current control loop), but BCSC is able to regulate the dc-bus voltage and shape the ac-side current. The provided results in both the rectifier operation and the inverter operation demonstrate the effectiveness of the proposed BCSC.
Blepharitis as an early sign of metabolic syndrome: a nationwide population-based study
(2018-09-01)
Lee, Chia-Yi
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Chen, Hung-Chi
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Lin, Hui-Wen
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Huang, Jing-Yang
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Chao, Shih-Chun
Background To investigate the relationship between blepharitis and metabolic syndrome (MetS) by using the Longitudinal Health Insurance Database (LHID) of Taiwan. Methods This retrospective cohort study was conducted using data collected from the LHID for the period from 2009 to 2013. This study enrolled patients who received a diagnosis of blepharitis according to the International Classification of Diseases, Ninth Revision, diagnostic code. The exclusion criteria were legal blindness, eyeball removal, ocular tumours prior to the diagnosis of blepharitis, and patients diagnosed with blepharitis and initiated antibiotic treatment concurrently. An age-matched, gender-matched and disease-matched population without blepharitis served as the control group. Multivariate analysis with a multiple Cox regression model was applied to analyse the data. Results In this study, a total of 10 093 patients with blepharitis were included in the study group, and another 40 372 participants without blepharitis were included in the control group. Conditional logistic regression revealed a higher cumulative probability of hyperlipidaemia and coronary arterial disease. After adjustment, patients with blepharitis had a higher probability of developing new MetS than controls. According to subgroup analysis, hyperlipidaemia and coronary artery diseases were significantly correlated with the prior development of blepharitis. However, hypertension and diabetes mellitus and insulin resistance showed no correlation with blepharitis. Conclusion Blepharitis is significantly related to MetS and can serve as an early sign of MetS. Additional studies should examine the relationship between blepharitis and MetS in terms of severity.
Common Mode and Differential Mode Circulating-Current Control in Paralleled Single-Phase Boost Rectifiers
(2013)
Liao, Yi-Hung
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Chen, Hung-Chi
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Cheng, Hsiu-Che
;
電機工程學系
;
Department of Electrical and Computer Engineering
In this paper, the analysis of circulating currents of a paralleled single-phase boost rectifier system is presented. The DC loop and AC loop circulating currents are clearly explained. Based on the analysis of circulating currents, common mode circulating current (CMCC) and differential mode circulating current (DMCC) are clearly defined. Then, CMCC and DMCC compensators in a centralized control scheme are proposed to reduce the common-mode and differential-mode circulating currents in the parallel rectifier system. Finally, a prototype system is constructed and some experimental results are carried out to verify the validity of the proposed control scheme. From experimental results, the proposed control scheme can indeed reduce the circulating currents under different power rating condition in the parallel system.
Comparisons of Six-Step Square-Wave PWMs in Ultra-Low-Power SOC Integration
(2009)
Chen, Hung-Chi
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Tsai, Tzu-Yang
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Huang, Chih-Kai
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電控工程研究所
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Institute of Electrical and Control Engineering
It is well-known that ultra-low-power three-phase elements, such as ultra-small-size permanent-magnet brushless motor drivers, have been widely used in the consumer products. In order to reduce the cost, size and power consumption of products, it is necessary to integrate the system functions with square-wave PWM (SWPWM) driver in the system-on-chip (SOC) implementation. It follows that, the driver loss and loss distribution are the main challenges in the integration of ultra-low-power SWPWM driver where the driver loss include conducting loss, switching loss and gate driving loss, where the last one is often neglected in other low-, medium- and high-power drivers. On the other hand, there are 16 types and 64 types in 120-degree SWPWM and 180-degree SWPWM, respectively, and the resulting driver loss and loss distribution differ from each other. This paper studies the driver loss and loss distributions of all SWPWM types in detail. The result shows that SWPWM type-01_01, type-10_10 and type-010_010 are the recommended types in the SOC integration of ultra-low-power SWPWM driver.
Control of Bidirectional Interleaved DC-DC Converter With Single Current Sensor
(2018-01-01)
Chen, Hung-Chi
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Lu, Che-Yu
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Lu, Chi-Hsiu
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電機工程學系
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電控工程研究所
Current sharing control method for bidirectional interleaved DC-DC converter is presented in this paper. An single-current sampling strategy is proposed to measure and reconstruct the difference of average inductor currents from single current sensor. Based on the theoretical analysis, the proposed control method can restrain the interactions from voltage regulation loop and current sharing loop. In addition, the small-signal transfer functions among control signals, output voltage and current imbalances are clearly derived. Finally, a 300-W three-phase bidirectional interleaved DC-DC converter prototype is built, and the control algorithm is implemented in a Field Programmable Gate Array (FPGA) chip. Eventually, the proposed current sharing control method and single current sensor sampling strategy is validated through some simulation and experimental results.