Browsing by Author "Chen, Hung-Hsin"

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Detecting Stability Faults in Sub-threshold SRAMs
(2011)
Lin, Chen-Wei
;
Yang, Hao-Yu
;
Huang, Chin-Yuan
;
Chen, Hung-Hsin
;
Chao, Mango C. -T.
Detecting stability faults has been a crucial task and a hot research topic for the testing of conventional super-threshold 6T SRAM in the past. When lowering the supply voltage of SRAM to the subthreshold region, the impact of stability faults may significantly change, and hence the test methods developed in the past for detecting stability faults may no longer be effective. In this paper, we first categorize the subthreshold-SRAM designs into different types according to their bit-cell structures. Based on each type, we then analyze the difference of its stability faults compared to the conventional super-threshold 6T SRAM, and discuss how the stability-fault test methods should be modified accordingly. A series of experiments are conducted to validate the effectiveness of each stability-fault test method for different types of subthreshold-SRAM designs.
Fault Models and Test Methods for Subthreshold SRAMs
(2010)
Lin, Chen-Wei
;
Chen, Hung-Hsin
;
Yang, Hao-Yu
;
Chao, Mango C-T
;
Huang, Rei-Fu
Due to the increasing demand of an extra-low-power system, a great amount of research effort has been spent in the past to develop an effective and economic subthreshold-SRAM design. However, the test methods regarding those newly developed subthreshold-SRAM designs have not yet been fully discussed. In this paper, we first categorize the subthreshold-SRAM designs into three types, study the faulty behavior of different open defects for each type of designs, and then identify the faults which may or may not be covered by a traditional SRAM test method. For those hard-to-detect faults, we will further discuss the corresponding test method according to different each type of subthreshold-SRAM designs. At last, a discussion about the temperature at test will also be provided.
Fault Models and Test Methods for Subthreshold SRAMs
(2013-03-01)
Lin, Chen-Wei
;
Chen, Hung-Hsin
;
Yang, Hao-Yu
;
Huang, Chin-Yuan
;
Chao, Mango C. -T.
Due to the increasing demand of an extra-low-power system, a great amount of research effort has been spent in the past to develop an effective and economic subthreshold SRAM design. However, the test methods regarding those newly developed subthreshold SRAM designs have not yet been fully discussed. In this paper, we first categorize the subthreshold SRAM designs into three types, study the faulty behavior of open defects and address decoders faults on each type of designs, and then identify the faults which may not be covered by a traditional SRAM test method. We will also discuss the impact of open defects and threshold-voltage mismatch on sense amplifiers under subthreshold operations. A discussion about the temperature at test is also provided.
Plasmonic thermal emitter using perfect absorber made of metallic disk on SiO2
(2012)
Abbas, Mohammed Nadhim
;
Cheng, Cheng-Wen
;
Chang, Yia-Chung
;
Shih, Min-Hsiung
;
Chen, Hung-Hsin
It is shown that the metallic disk structure can be used as an efficient narrow-band thermal emitter in the IR region. The absorption spectra of such structure are investigated both theoretically and experimentally. Calculations of thermal radiation properties of the metallic disk show that the metallic disk is a perfect emitter at a specific wavelength. The metallic disk exhibits only one significant localized surface plasmon polariton mode for both TM and TE polarizations simultaneously.
Testing Strategies for a 9T Sub-threshold SRAM
(2012)
Yang, Hao-Yu
;
Lin, Chen-Wei
;
Chen, Hung-Hsin
;
Chao, Mango C. -T.
;
Tu, Ming-Hsien
Due to the increasing demands of lower-power devices, a lot of research effort has been devoted to develop new SRAM cell designs that can be effectively and economically operated at the subthreshold region. However, each new SRAM cell design has its own cell structure and design techniques, which may result in different faulty behaviors than the conventional 6T SRAMs and require specialized test methods to detect those uncovered fault models. In this paper, we focus on developing the test methods for testing a new 9T subthreshold SRAM design, which utilizes single bit-line read/write, two write word-lines for writing different values, and a separate read path. A mixed march algorithm with different background and address-traverse directions is proposed to detect various uncovered fault models and validated through real test chips. A new specialized technique of floating bit-line attacking is also presented to detect the stability faults, which cannot be effectively detected by applying the conventional test methods, for the new 9T SRAM design.