Browsing by Author "Chen, Hung-Sen"

Now showing 1 - 2 of 2

Junction and Device Characteristics of Gate-Last Ge p- and n-MOSFETs With ALD-Al(2)O(3) Gate Dielectric
(2009-08-01)
Cheng, Chao-Ching
;
Chien, Chao-Hsin
;
Luo, Guang-Li
;
Lin, Ching-Lun
;
Chen, Hung-Sen
In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited-Al(2)O(3) gate dielectrics. The magnitudes of the rectifying ratios for the Ge p(+)-n and n(+)-p junctions exceeded three and four orders of magnitude (in the voltage range of +/-1 V), respectively, with accompanying reverse leakages of ca. 10(-2) and 10(-4) A . cm(-2), respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300 degrees C boosted the device on-current, decreased the Al(2)O(3)/Ge interface states to 8 x 10(11) cm(-2) . eV(-1), and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm(2) . V(-1) . s(-1) and > 10(3), respectively, for the p-FET (W/L = 100 mu m/4 mu m), while these values were less than 100 cm(2) . V(-1) . s(-1) and ca. 10(3), respectively, for the n-FET (W/L = 100 mu m/9 mu m). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.
Junction and Device Characteristics of Gate-Last Ge p- and n-MOSFETs With ALD-Al2O3 Gate Dielectric
(2009-08-01)
Cheng, Chao-Ching
;
Chien, Chao-Hsin
;
Luo, Guang-Li
;
Lin, Ching-Lun
;
Chen, Hung-Sen
In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited-Al2O3 gate dielectrics. The magnitudes of the rectifying ratios for the Ge p(+)-n and n(+)-p junctions exceeded three and four orders of magnitude (in the voltage range of +/-1 V), respectively, with accompanying reverse leakages of ca. 10(-2) and 10(-4) A . cm(-2), respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300 degrees C boosted the device on-current, decreased the Al2O3/Ge interface states to 8 x 10(11) cm(-2) . eV(-1), and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm(2) . V-1 . s(-1) and > 10(3), respectively, for the p-FET (W/L = 100 mu m/4 mu m), while these values were less than 100 cm(2) . V-1 . s(-1) and ca. 10(3), respectively, for the n-FET (W/L = 100 mu m/9 mu m). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.