Browsing by Author "Chen, Jui-Lung"

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120% Harvesting Energy Improvement by Maximum Power Extracting Control for High Sustainability Magnetic Power Monitoring and Harvesting System
(2015-04-01)
Huang, Tzu-Chi
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Du, Ming-Jhe
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Kang, Yu-Chai
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Peng, Ruei-Hong
;
Chen, Ke-Horng
The magnetic energy harvesting (MEH) circuit and the power monitoring system are proposed in this paper to enlarge the system sustainability on wireless sensing or the monitoring system. The proposed MEH circuit harvests magnetic power on power wires through a power sensing current transformer (CT) and charges power monitoring system. The MEH circuit includes the direct ac-dc rectifier and the maximum power extracting (MPE) control circuit. The direct ac-dc rectifier can directly rectify ac input to the dc output current. The proposed MPE control fits the characteristic of magnetic energy source compared to the conventional resistor emulation maximum power point tracking method. Owing to continuous tracking the maximum power of the CT, 120% harvesting power improvement can be achieved under the same CT\'s sensing current. Peak efficiency of 82% can be achieved under the sensing current of 8 A. The test chip is fabricated in 0.25 mu m CMOS process with an active area of 0.98 mm(2).
120V/ns Output Slew Rate Enhancement Technique and High Voltage Clamping Circuit in High Integrated Gate Driver for Power GaN FETs
(2015)
Yang, Hsiang-An
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Chiu, Chao-Chang
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Lai, Shin-Chi
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Chen, Jui-Lung
;
Chang, Chih-Wei
High power density is a key point that power converters endeavor to pursue. However, it is rare that gate driver of power converter can switch under high supply voltage with a fast operation frequency. In this paper, a half-bridge driver with the slew rate enhancement (SRE) technique is proposed and its switching frequency can be increased to 25MHz under a 700V supply voltage. Besides, the proposed high voltage clamping circuit ensures all circuits operating in a safe region without any overvoltage problems in the bootstrap operation. With specifically developed high voltage high speed (HVHS) process, high-side and low-side circuits can be well shielded by the isolation well which is embedded in the level shifter device to minimize chip size.
93% Efficiency and 0.99 Power Factor in Pseudo-linear LED Driver
(2016-01-01)
Chiu, Shao-Wei
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Kuo, Chun-Chieh
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Chuang, Kai-Cheng
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Yang, Wen-Hau
;
Chen, Ke-Horng
The proposed pseudo-linear LED driver can effectively solve the serious flicker in conventional linear LED driver (LLD). Besides, it has good electromagnetic interference (EMI) performance similar to that in conventional LLD at high AC input voltage. In the meanwhile, it has high power factor (PF) similar to boost switching regulator (SWR) LED driver at low AC input voltage. Furthermore, owing to the combination of line filter and the active full bridge rectifier, the pseudo-linear LED driver has a compact solution and high efficiency. The test chip was fabricated in 0.5 mu m 500V LDMOS process. Experimental results show 93% high efficiency, 6% total harmonic distortion (THD), and 0.99 PF at the power of 7W.
95% Light-load Efficiency Single-Inductor Dual-Output DC-DC Buck Converter with Synthesized Waveform Control Technique for USB Type-C
(2016)
Yang, Wen-Hau
;
Lin, Chiun-He
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Chen, Ke-Horng
;
Wey, Chin-Long
;
Lin, Ying-Hsi
The proposed single-inductor dual-output (SIDO) converter can provide wide range in duty ratio control to convert input voltage 520V to dual output voltages 3.3V and 1.2V when its switching frequency is raised to 10MHz for compact size solution. The proposed synthesized waveform control (SWC) technique can emulate the inductor current without being affected by switching noise. Thus, the minimum allowable duty ratio can be lowered to 6% to meet the requirement of USB-C in one-stage low duty ratio conversion. Moreover, the switching frequency is dynamically decreased by the derived DC loading information from the SWC technique. Not only the output power MOSFET but also the main power MOSFET switch in a load-dependent switching frequency for power saving. 67% more power reduction can be obtained. 95% and 83% efficiency are achieved at light and heavy loads, respectively, when the silicon is limited within 1400 mu m*1350 mu m.
A Low Quiescent Current and Cross Regulation Single-Inductor Dual-Output Converter with Stacking MOSFET Driving Technique
(2017-01-01)
Ma, Yu-Sheng
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Yang, Wen-Hau
;
Lin, Yen-Ting
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Chen, Hsin
;
Lin, Li-Chi
the stacking MOSFET structure composed of low-voltage devices suffers from deteriorated transient response or large footprint area when capacitor-free or dominant pole compensation low dropout (LDO) regulator biases the driver. Due to self-stabilized feature, the proposed stacking MOSFET driving (SMD) technique effectively drives the power stage and greatly reduces noise interference from the noisy node to achieve low cross regulation (CR) in the single-inductor dual-output (SIDO) converter. Moreover, two inherent low dropout (LDO) regulators in the SMD technique completely regulate two outputs with low quiescent current at no load condition. Experimental results show the tested chip fabricated in 0.25 mu m process with low cross regulation of 0.015mV/mA and ultra-low quiescent current of 5 mu A at no load condition.