Browsing by Author "Chen, Ming-Yi"

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Characterization of Annular-Structure RF LDMOS Transistors Using Polyharmonic Distortion Model
(2009)
Chiu, Chia-Sung
;
Chen, Kun-Ming
;
Huang, Guo-Wei
;
Hsiao, Chih-Hua
;
Liao, Kuo-Hsiang
An annular-structure lateral-diffused metal-oxide semiconductor (LDMOS) RF transistor with polyharmonic distortion (PHD) model characterized by nonlinear vector network analyzer is described in this paper. The devices were fabricated using a 0.5 mu m LDMOS process. The DC, small-signal, and large-signal characteristics of RF LDMOS transistors with annular-structures were also studied in this work. Using the PHD model, the accuracy of intermodulation and time waveform is verified. Furthermore, the model via X-parameter shows good agreement without optimization.
Investigation of Hot-Carrier Stress Effect on High-Frequency Performance of Laterally Diffused Metal-Oxide-Semiconductor Transistors
(2012-02-01)
Chen, Kun-Ming
;
Mou, Zong-Wen
;
Kuo, Hao-Chung
;
Chiu, Chia-Sung
;
Chen, Bo-Yuan
The hot-carrier stress effects on the high-frequency performance characteristics of laterally diffused metal-oxide-semiconductor (LDMOS) transistors were investigated. A constant bias channel hot-carrier stress was applied at room temperature. After applying 3 h of hot-carrier stress, the on-resistance and saturation drain current degradations are 18 and 9%, respectively. However, the degradations of the cutoff frequency and maximum oscillation frequency were less than 2% when the devices were biased before the onset of quasi-saturation. In addition, we found that the degradations of high-frequency parameters are not related to the change in transconductance but to the changes in gate capacitances. Finally, S-parameter variations under hot-carrier stress were also examined in this study. The observations of S-parameter variations are important for RF power amplifier design. (C) 2012 The Japan Society of Applied Physics
LDMOS Transistor High-Frequency Performance Enhancements by Strain
(2012-04-01)
Chen, Kun-Ming
;
Huang, Guo-Wei
;
Chen, Bo-Yuan
;
Chiu, Chia-Sung
;
Hsiao, Chih-Hua
The effects of mechanical stress on the dc and high-frequency performances of laterally diffused MOS (LDMOS) transistors with different layout structures were investigated by using the wafer bending method. A 3.1% peak cutoff frequency (f(T)) enhancement is achieved for the multifinger device under 0.051% biaxial tensile strain. For LDMOS with annular layout, the f(T) enhancement is increased to 3.7% due to the various channel directions. Our results suggest the strain technology can be adopted in LDMOS for RF applications. The transconductance and gate capacitance were also extracted to clearly demonstrate the f(T) variations.
Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact
(2013-09-01)
Chen, Kun-Ming
;
Chen, Bo-Yuan
;
Chiu, Chia-Sung
;
Huang, Guo-Wei
;
Chen, Chun-Hao
In this letter, we proposed a new layout structure for RF laterally diffused metal-oxide-semiconductor (LDMOS) transistors. In a multifinger layout, the drain contact region was designed to be wider than the channel region. The wider drain increases the equivalent drift region width to reduce the drift resistance and suppress the quasi-saturation effect. We found that the wide-drain multifinger LDMOS devices have lower on-resistance, higher cutoff frequency, higher maximum oscillation frequency, and better power performances than the standard multifinger ones.
Temperature-dependent capacitance characteristics of RF LDMOS transistors with different layout structures
(2008-07-01)
Hu, Hsin-Hui
;
Chen, Kun-Ming
;
Huang, Guo-Wei
;
Chen, Ming-Yi
;
Cheng, Eric
In this letter, the capacitance characteristics of RF LDMOS transistors with different temperatures and layout structures were studied. In a conventional fishbone structure, the peaks in capacitances decrease with increasing temperature. For the ring structure, two peaks in a capacitance-voltage curve have been observed at high drain voltages due to the additional corner effect. in addition, peaks in gate-to-source/body capacitance decrease and peaks in gate-to-drain capacitance increase with increasing temperature at high drain voltages. By analyzing the effects of temperature on threshold voltage, quasi-saturation current, and drift depletion capacitance, the variations of capacitances with temperature were investigated.