Browsing by Author "Chen, PL"

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A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applications
(2006-06-01)
Chen, PL
;
Chung, CC
;
Yang, JN
;
Lee, CY
;
電子工程學系及電子研究所
This work presents a clock generator with cascaded dynamic frequency counting (DFC) loops for wide multiplication range applications. The DFC loop, which uses variable time period to estimate and tune the frequency of the digitally controlled oscillator (DCO), enhances the resolution of frequency detection. The conventional phase-frequency detector (PFD) and programmable divider are replaced with a digital arithmetic comparator and a DCO timing counter. The value in the DCO timing counter is separated into quotient and remainder vectors. A threshold region is set in the remainder vector to reduce the influence of jitter variation in frequency detection. The loop stability can be retained by cascading two DFC loops when the multiplication factor (N) is large. The proposed clock generator achieves a multiplication range from 4 to 13 888 with output peak-to-peak jitter less than 2.8% of clock period. A test chip for the proposed clock generator is fabricated in 0.18-mu m CMOS process with core area of 0.16 mm(2). Power consumption is 15 mW.@ 378 MHz with 1.8-V supply voltage.
A compact software-controlled clock multiplier for SoC application
(2002)
Chen, PL
;
Lee, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A compact software-controlled clock multiplier for SoC application is presented in this paper. The control mechanism of clock multiplier includes frequency acquisition, phase acquisition and phase/frequency maintenance modes; these operations sequence are programmable. Our proposed clock multiplier is integrated with an 8-bit microcontroller in order to verify the proposed software-controlled mechanism. The control mechanism is sharing with the computing power of microcontroller. A proto-type chip has been implemented with 0.35 um 1P4M CMOS process that can operate from 25MHz to 80MHz. The multiplication factor can range from 2 to 128 and software instructions are less than 90 instructions. Thus it not only reduces the cost and design complexity of clock multiplier, but also offers particular advantages, especially when computing power is already available.
A novel digitally-controlled varactor for portable delay cell design
(2004-12-01)
Chen, PL
;
Chung, CC
;
Lee, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, a novel digitally-controlled varactor (DCV) for portable delay cell design is presented. The proposed varactor uses the gate capacitance differences of NAND/NOR gates under different digital control inputs to build up a digitally-controlled varactor. Then the proposed varactor is applied to design a high resolution delay cell and to achieve a fine delay resolution. Different types of NAND/NOR gates (2-input or 3input) for DCV design are also investigated in this paper. The proposed DCV can be implemented with standard cells, thus it can be easily ported to different processes in a short time. A test chip fabricated on a standard 0.35 mum CMOS 2P4M process proves that the proposed delay cell has a fine delay resolution about 1.55 ps. As a result, the proposed DCV exhibits finer resolution, better linearity, and better portability than traditional delay elements, and is very suitable for portable delay cell design.
A portable digitally controlled oscillator using novel varactors
(2005-05-01)
Chen, PL
;
Chung, CC
;
Lee, CY
;
電子物理學系
;
Department of Electrophysics
This work presents a portable digitally controlled oscillator (DCO) by using two-input NOR gates as a digitally controlled varactor (DCV) in fine-tuning delay cell design. This novel varactor uses the gate capacitance difference of NOR gates under different digital control inputs to establish a DCV. Thus proposed DCO can improve delay resolution 256 times better than a single buffer design. This study also examines different types of NOR/NAND gates (2-input or 3-input) for DCV. The proposed DCO with novel DCV can be implemented with standard cells, and thus it can be ported to different processes in short time. Furthermore, the final circuit layout can be generated using an auto placement and routing (APR) tools. A test chip demonstrates that LSB resolution of the DCO can be improved to 1.55 ps with standard 0.35-mu m 2P4M CMOS digital cell library. The proposed DCO has good performance in terms of fine resolution, high portability, and short design turnaround cycle compared with conventional DCO designs.
A standard cell-based frequency synthesizer with dynamic frequency counting
(2005-12-01)
Chen, PL
;
Lee, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper presents a standard cell-based frequency synthesizer with dynamic frequency counting (DFC) for multiplying input reference frequency by N times. The dynamic frequency counting loop uses variable time period to estimate and tune the frequency of digitally-controlled oscillator (DCO) which enhances frequency detection's resolution and loop stability. Two ripple counters serve as frequency estimator. Conventional phase-frequency detector (PFD) thus is replaced with a digital arithmetic comparator to yield a divider-free circuit structure. Additionally, a 15 bits DCO with the least significant bit (LSB) resolution 1.55 ps is designed by using the gate capacitance difference of 2-input NOR gate in fine-tuning stage. A modified incremental data weighted averaging (IDWA) circuit is also designed to achieve improved linearity of DCO by dynamic element matching (DEM) skill. Based on the proposed standard cell-based frequency synthesizer, a test chip is designed and verified on 0.35-mu m complementary metal oxide silicon (CMOS) process, and has a frequency range of (18-214) MHz at 3.3 V with peak-to-peak (P-k-P-k)jitter of less than 70 ps at 192 MHz/3.3 V.
An all-digital PLL with cascaded dynamic phase average loop for wide multiplication range applications
(2005)
Chen, PL
;
Chung, CC
;
Lee, CY
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
An all-digital phase locked loop (ADPLL) with cascaded dynamic phase average (DPA) loop for wide multiplication range applications is presented in this paper. The multiplication factor can range from 4 to 65025 (255 x 255). The proposed architecture involves a minimum of hardware and improves jitter performance to reduce the noise and jitter associated with input reference. The dynamic phase averaging (DPA) loop control employing digital phase estimators (DPE) enhances frequency detection resolution and loop stability. A (Q.R) vector counter and an additional state counter serve as phase estimators. The proposed ADPLL includes cascaded DPA loops: the first stage is low frequency loop and the second stage is high frequency loop. A proto-type chip has been implemented with 0.18 mu m 1P6M CMOS process that can operate from 2MHz to 500MHz. The input frequency ranges from 5KHz to 50MHz. Thus it not only reduces the cost and design complexity of ADPLL, but also offers particular advantages for wide multiplication range applications.
An effective method for evaluating the image-sticking effect of TFT-LCDs by interpretative modelling of optical measurements
(2000-07-01)
Chen, PL
;
Chen, SH
;
Su, FC
;
光電工程學系
;
Department of Photonics
The conventional method of evaluating the image-sticking effect of a LCD module is inspection by sight, because the residual optical difference between two stressing areas is small and viewing angle-dependent, so that it is difficult to obtain a significant optical difference value by instrumental measurement. We propose an effective method for evaluating the image-sticking effect of a TFT-LCD module by directly measuring its time evolution of transmission with the TFT glass turned off after a period of pattern stress. In this way, the liquid crystal system under charge equilibrium in constant-charge mode shows a dramatically amplified optical difference. Further, we interpret the measured results by a modelling that combines the calculation of liquid crystal director orientation and ionic charge distribution. It is supposed that there are four time constants that dominate the overall sticking phenomenon and belong to four transient processes: adsorption of ions, desorption of free ions, desorption of stuck ions, and TFT leakage. The modelling shows good accordance between measured and simulated results when fitting parameters are properly chosen.
Analysis of a liquid crystal Fabry-Perot etalon filter: A novel model
(1997-04-01)
Chen, PL
;
Lin, KC
;
Chuang, WC
;
Tzeng, YC
;
Lee, KY
The authors propose a novel analysis method to investigate the characteristics of an electrically tunable liquid-crystal Fabry-Perot interferometer (LC-FPI), Based on the solution of deformation analysis of liquid crystal in an electric field and the assumption of small refractive index variation in the Fabry-Perot cavity, the voltage-dependent equivalent refractive index of the cavity has been derived. Tuning behaviors of the LC-FPI filter were simulated by means of the dependence, The calculated result and the experimental measured data agree well with each other.
Analysis of a liquid crystal Fabry-Perot etalon filter: A novel model
(1997-04-01)
Chen, PL
;
Lin, KC
;
Chuang, WC
;
Tzeng, YC
;
Lee, KY
The authors propose a novel analysis method to investigate the characteristics of an electrically tunable liquid-crystal Fabry-Perot interferometer (LC-FPI), Based on the solution of deformation analysis of liquid crystal in an electric field and the assumption of small refractive index variation in the Fabry-Perot cavity, the voltage-dependent equivalent refractive index of the cavity has been derived. Tuning behaviors of the LC-FPI filter were simulated by means of the dependence, The calculated result and the experimental measured data agree well with each other.
Anodic aluminum oxide template assisted growth of vertically aligned carbon nanotube arrays by ECR-CVD
(2004-11-01)
Chen, PL
;
Chang, JK
;
Kuo, CT
;
Pan, FM
;
材料科學與工程學系
Highly aligned carbon nanorubes (CNTs) have been successfully grown in vertical channels of the anodic aluminum oxide (AAO) template by microwave plasma electron cyclotron resonance chemical vapor deposition (ECR-CVD). Nanoporous AAO templates with hexagonal pore pattern were prepared by the two-step anodization of A] films. Following the electroplating of Co catalyst into the pore bottom, multiwalled CNTs were synthesized in the ECR-CVD system using a gas mixture of CH4 and H-2. The microstructure of the CNTs was studied by scanning electron microscopy (SEM) and transmission electron microscopy (TEM). The CNTs with a very high packing density and a uniform size distribution are well graphitized, and Co particles embedded at their tips implies the tip growth mechanism. The segments of CNTs stretching out of the AAO nanopores still maintain relatively good alignment, and have a very slow growth rate, which allows us to obtain reproducible tube length by tuning the growth time. Field emission measurements of the CNTs showed derivable electron emission properties, attributed to their uniformity in size, good alignment, and good graphitization properties. (C) 2004 Elsevier B.V. All rights reserved.
Anomalous capacitance bounces and bumps of liquid crystal cells in DC electric fields
(2000-04-01)
Chen, PL
;
Chen, SH
;
光電工程學系
;
Department of Photonics
We have studied the time response of the capacitance of nematic liquid crystal cells by applying electric fields. When AC fields are applied, the capacitance exhibited a normal behavior: it first increased monotonically with time, and then reached a saturating value, With sufficient high DC fields, capacitance bounces and bumps were observed during the rising time for 100-mu m thick cells with low and high impurity concentrations, respectively. We believe that these anomalous capacitance characteristics of liquid crystal cells are resulted from the coupling effects between induced polarization from liquid crystal molecules and space-charge polarization from fast ions.
Fabrication and field emission characteristics of highly ordered titanium oxide nanodot arrays
(2005)
Chen, PL
;
Huang, WJ
;
Chang, JK
;
Kuo, CT
;
Pan, FM
A field emission triode device has been fabricated using self-organized nanodot arrays as the electron emission source. Uniform nanodot arrays of titanium oxide were prepared from the Al/Ti film stack on silicon substrates by electrochemical anodization. The field emission triodes with titanium oxide nanodot emitters exhibited a low gate turn-on voltage of 45 V and high emission current density of 25 mA/cm(2) at 120 V. The excellent electric properties and easily controllable fabrication process of the nanodot triodes show potential applications for field emission displays and vacuum microelectronics. (c) 2005 The Electrochemical Society.
Field emission of carbon nanotubes on anodic aluminum oxide template with controlled tube density
(2005-03-21)
Chen, PL
;
Chang, JK
;
Kuo, CT
;
Pan, FM
;
材料科學與工程學系
The tube number density of aligned carbon nanotubes (CNTs) grown over the nanoporous anodic aluminum oxide (AAO) template can be directly controlled by adjusting the CH4/H-2 feed ratio during the CNT growth. We ascribe the variation of the tube density as a function of the CH4/H-2 feed ratio to the kinetic competition between outgrowth of cobalt-catalyzed CNTs from the AAO pore bottom and deposition of the amorphous carbon (a-C) overlayer on the AAO template. A pore-filling ratio of 18% to 82% for the nanotubes overgrown out of nanopores on the AAO template can be easily achieved by adjusting the CH4/H-2 feed ratio. Enhanced field emission properties of CNTs were obtained by lowering the tube density on AAO. However, at a high CH4 concentration, a-C by-product deposit on the CNT surface can degrade the field emission property due to a high energy barrier and significant potential drop at the emission site. (C) 2005 American Institute of Physics.
Measurement of electrically tunable liquid-crystal Fabry-Perot interferometer using a monochromatic light source
(1999-07-05)
Lin, KC
;
Lin, JS
;
Chen, PL
;
Chuang, WC
;
光電工程學系
We propose a novel technique to characterize an electrically tunable liquid-crystal Fabry-Perot interferometer. Only one usual set of a monochromatic light source and an optical power meter is needed. Various characteristic parameters were estimated based on the equivalent refractive index analysis and the measured voltage-dependent transmittance. (C) 1999 John Wiley & Sons, Inc.
Novel selective process via self-assembled monolayers for pattern growth of carbon nanotubes
(2004-04-01)
Kuo, DS
;
Chen, PL
;
Kuo, CT
;
材料科學與工程學系
;
Department of Materials Science and Engineering
In this study, a novel IC compatible deposition process to fabricate the CNTs pattern with tunable tube number density was successfully developed by using the liquid chemical technologies of self-assembled monolayers (SAMs) and the Fe-assisted CNTs growth. The tube number density could be controlled by changing the SAMs formation and post processing parameters. The Si wafers with the a:Si/Si3N4 layer patterns were first prepared by low pressure chemical vapor deposition (LPCVD) and lithography techniques to act as the substrates for selective deposition of SAMs. The selectivity of SAMs from APTMS solution (N-(2-aminoethyl)-3-aminopropyltrimethoxsilane) is based on its greater reactivity of head group on a:Si than SO, films. The areas of pattern with SAMs will first chelate the Fe3+ ions by their diamine-terminated group. The Fe3+ ions were then consolidated to become Fe-hydroxides in NaBH, Solution to form the Fe-hydroxides pattern. Finally, the Fe-hydroxides pattern was pretreated in H plasma, and followed by CNTs deposition using Fe as catalyst in a microwave plasma-chemical vapor deposition (MPCVD) system to become the CNTs pattern. The products in each processing step, including SAMs, Fe-hydroxides and CNTs, were characterized by contact angle measurements, scanning electron microscopy (SEM), Raman, XPS and Auger spectroscopy. The results show that the main process parameters include the surface activation process and its atmosphere, consolidation time and temperature, H plasma pretreatment. The function of each processing step will be discussed. (C) 2004 Elsevier B.V. All rights reserved.
Post-Cu CMP cleaning for colloidal silica abrasive removal
(2004-11-01)
Chen, PL
;
Chen, JH
;
Tsai, MS
;
Dai, BT
;
Yeh, CF
In this study, an efficient approach for the removal of colloidal silica abrasives from the polished copper surface was proposed and demonstrated. This post-chemical mechanical polishing (CMP) cleaning process combines a buffing process with dilute HNO3/benzotriazole (BTA) aqueous solution for copper surface passivation and a polyvinyl alcohol (PVA) brush scrubbing process with wetting surfactants, Triton X-100, for colloidal silica removal. Buffing with HNO3/BTA aqueous solution was able to remove copper oxide and form the Cu(I)-BTA hydrophobic passivation. Scrubbing with Triton X-100 surfactant is to enhance the wettability on Cu(I)-BTA surface for the removal of residual silica abrasives. The wetting ability of Triton X-100 was determined by a contact angle and surface tension measurements. It was demonstrated that silica abrasives could be removed efficiently without copper corrosion by this cleaning process. (C) 2004 Elsevier B.V. All rights reserved.
Preparation and phase transformation of highly ordered TiO2 nanodot arrays on sapphire substrates
(2004-05-10)
Chen, PL
;
Kuo, CT
;
Pan, FM
;
Tsai, TG
;
材料科學與工程學系
Ordered nanodot arrays of titanium oxide (TiO2) were prepared from an epitaxial Al/TiN bilayered film on a sapphire substrate by electrochemical anodization of the TiN layer using a nanoporous anodic aluminum oxide (AAO) film as the template. The nanodots with an average diameter of about 60 nm can faithfully duplicate the size, shape, and hexagonal pore pattern of the AAO nanopores. The phase development of the isolated TiO2 nanodots is very much different from TiO2 thin films and powders. After high temperature annealing, the nanodots are polycrystalline and consist of a mixed phase of anatase and rutile instead of single rutile phase. We expect that TiO2 nanodots with a single phase of anatase can be realized as long as the size of the nanodots is smaller than the critical nuclei size for rutile formation. (C) 2004 American Institute of Physics.
Selective growth of horizontally-oriented carbon nanotube bridges on patterned silicon wafers by electroless plating Ni catalysts
(2005-11-01)
Lin, CC
;
Chen, PL
;
Lin, CT
;
Kuo, CT
;
材料科學與工程學系
The main purpose of this research was to develop an Integrated Circuit compatible process to grow the horizontally-oriented carbon nanotubes (CNTs) across the trenches of the patterned Si wafer, which was produced by conventional photolithography technique. The selectivity of tile process is based oil the difference ill electrical conductivity between amorphous silicon (a:Si) and silicon nitride (Si3N4), where the catalyst can be much easier deposited by electroless plating on the a:Si part of the pattern. The selectivity is also based oil greater chemical reactivity of the catalyst with a:Si to form silicides, instead of with Si3N4. Furthermore, the Si3N4 barrier layer of the pattern was designed oil top of tile a:Si layer to guide the growth of CNTs in horizontal direction to bridge tile trenches of tile pattern. The as-deposited catalysts were examined by Auger electron spectroscopy (AES). The catalyst-coated pattern was pretreated in hydrogen plasnia and followed by CNT growth in a microwave plasina chemical vapor deposition (MPCVD) system. The CNT bridges were characterized by scanning electron microscopy (SEM), transmission electron rnicroscopy (TEM), high-resolution TEM (HRTEM), and I-V measurements. Under tile present deposition conditions, TEM and HRTEJM examinations indicate that the deposited nanostructures are bamboo-like InUltiwalled carbon nanOtLibes (MWNTs) with a wall thickness of 20 similar to 30 graphene layers. Electrical conductivity of the as-deposited MWNTs call be greatly improved by subjecting to 760 degrees C heat treatment under nitrogen atmosphere. The results demonstrate that the amounts of' CNTs and bridges are tunable with tile Ni catalyst plating time. Under the present experimental configuration and at a catalyst plating time of 20 s, countable numbers of bridges call be obtained, which are selectively and horizontally grown oil the areas of the pattern with Ni catalyst. This process call be a step approaching the application of CNTs in electronic devices. (c) 2005 Elsevier B.V. All rights reserved.
Self-organized titanium oxide nanodot arrays by electrochemical anodization
(2003-04-28)
Chen, PL
;
Kuo, CT
;
Tsai, TG
;
Wu, BW
;
Hsu, CC
Ordered nanodot arrays of titanium oxides were prepared from TiN/Al films on the silicon substrate by electrochemical anodization of a TiN layer using a nanoporous anodic aluminum oxide film as the template. The microstructure of the nanodot arrays was studied by transmission electron microscopy and scanning electron microscopy, and the chemical composition of nanodots was analyzed by electron energy loss spectroscopy. The as-prepared nanodots are basically composed of amorphous TiOx with a hexagonal arrangement and an average diameter of about 60 nm. Using this approach, it is expected that nanodot arrays of various oxide semiconductors can be achieved. (C) 2003 American Institute of Physics.
Tube number density control of carbon nanotubes on anodic aluminum oxide template
(2005-03-01)
Chen, PL
;
Chang, JK
;
Pan, FM
;
Kuo, CT
;
材料科學與工程學系
We demonstrate that the tube number density of well-aligned carbon nanotubes (CNTs) grown over the nanoporous anodic aluminum oxide (AAO) template can be directly controlled by adjusting the CH4/H-2 feed ratio during the CNT growth in a microwave plasma electron cyclotron resonance chemical vapor deposition (ECR-CVD) system. During the CNT growth, the nanotube growth and the amorphous carbon deposition on the AAO pore wall take place simultaneously. The amorphous carbon sediment will gradually cover up the AAO nanopores and prevent the nanotubes to grow out of the nanopores. By adjusting the CH4/H(2)feed ratio, one can control the amount of the deposited amorphous carbon and thus the number of CNTs grown over the AAO nanopores. It was found that the CNT density decreases linearly with increasing the CH4 concentration. The CNT density decreased by a factor of about 4.5 when the CH4 concentration increased from 9% to 91%. (c) 2004 Elsevier B.V. All rights reserved.