Browsing by Author "Chen, Po-Hsun"

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A Dual-Gate InGaZnO4-Based Thin-Film Transistor for High-Sensitivity UV Detection
(2019-08-01)
Chen, Po-Hsun
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Tsao, Yu-Ching
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Chien, Yu-Chieh
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Chiang, Hsiao-Cheng
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Chen, Hua-Mao
UV-sensing devices have received significant recent attention for applications in areas such as human health, fire detection, and optical communication. One key factor for product commercialization is determining the optimal materials that allow for integration of excellent UV-sensing properties with compatibility with industrial fabrication processes. However, current UV sensors often fail to achieve this due to either mismatched materials or a device that must be excessively large in order to produce enough photocurrent for UV detection. The UV-light-sensing properties of an amorphous InGaZnO4 (IGZO) thin-film transistor with a dual-gate structure and relatively small device size (width/length = 50 mu m/10 mu m) that achieves high sensitivity through a threshold-voltage-(V-th)-adjustment method is proposed. Comparing the drain currents under UV exposure to those under darkened conditions indicates that the ratio between the photoinduced and dark current reaches 10(6). Furthermore, the UV sensitivity of the dual-gate transistors can be adjusted by varying the bottom gate voltage, with each pixel of the sensor then being read out separately via scan line pulses. This allows the dual-gate a-IGZO transistor to be used for high-performance UV sensing while being effectively integrated in display applications.
Abnormal C-V Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs
(2019-11-01)
Huang, Shin-Ping
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Chen, Po-Hsun
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Tsao, Yu-Ching
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Chen, Hong-Chih
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Zheng, Yu-Zhe
We investigate the abnormal current-voltage (C-V) hump effect of p-type low-temperature polysilicon (LTPS) thin-film transistors (TFTs) which have undergone high current operations. Experimental results indicate localized electron trapping in the gate insulator (GI), which is carried out near the drain. The ON-current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) enhancement is due to the reduction of effective length, and the OFF-current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ) decrease as the electron tunneling path distance increases. These can be observed after hot carrier stress in current characteristics. The C-V measurements demonstrate that the threshold voltage ( ${V}_{\text {th}}$ ) shift is associated with the gate length. In addition, capacitance-voltage measurements also show that this localized trapping region remains the same in length, regardless of channel length. Hence, a model is proposed to explain how the electric field, which is gate length-dependent, affects the source side of the device, and then lowers the source barrier height. This leads to bulk leakage, which causes the subthreshold swing degradation at device scale down.
Adjustable built-in resistor on oxygen-vacancy-rich electrode-capped resistance random access memory
(2016-10)
Pan, Chih-Hung
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Chang, Kuan-Chang
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Chu, Tian-Jian
In this study, an adjustable built-in resistor was observed on an indium-tin oxide (ITO)-capped resistance random access memory (RRAM) device, which has the potential to reduce operating power. Quite notably, the high-resistance state (HRS) current of the device decreased with decreasing current compliance, and a special situation, that is, a gradual change in current always appears and climbs slowly to reach the compliance current in the set process even when the compliance current decreases, was observed. Owing to this observed phenomenon, the device is regarded to be equipped with an adjustable built-in resistor, which has the potential for low-power device application. (C) 2016 The Japan Society of Applied Physics
Analyzing Electric Field Effect by Applying an Ultra-Short Time Pulse Condition in Hafnium Oxide-Based RRAM
(2018-08-01)
Wu, Cheng-Hsien
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Lin, Shih-Kai
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Pan, Chih-Hung
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Chen, Po-Hsun
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Lin, Wen-Yan
In this letter, we determine the importance of the electrical field distribution and strength during the switching process by demonstrating different trends in the degree of reset and the reset pulse time. In general, a longer reset pulse time results in a higher reset energy; a higher reset energy leads to a higher degree of reset, which we obtainedby applying different width square waves. But quite notably, the opposite result was obtained using triangle waves, where a higher degree of reset occurred with a shorter rising time and lower reset energy. We believe that this is due to the electric field effect: if the voltage rises faster than the filament oxidation, the device can produce a larger effective electric field and a higher resistance in the reset process. To further investigate the mechanism, the procedure of the reset process was analyzed in detail, and COMSOL simulation is also carried out for confirmation.
Attaining resistive switching characteristics and selector properties by varying forming polarities in a single HfO2-based RRAM device with a vanadium electrode
(2017-07-07)
Lin, Chih-Yang
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Chen, Po-Hsun
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Chang, Ting-Chang
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Chang, Kuan-Chang
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Zhang, Sheng-Dong
This study proposes a method for a HfO2-based device to exhibit both resistive switching (RS) characteristics as resistive random access memory (RRAM) and selector characteristics by introducing vanadium (V) as the top electrode. This simple V/HfO2/TiN structure can demonstrate these two different properties depending on forming polarities. The RS mechanism is activated by a positive forming bias. In contrast, the selector property is induced by a negative forming bias. The material analyses firstly confirm the existence of V in the top electrode. Then the electrical measurements for the same V/HfO2/TiN structures but with different forming polarities were carried out to further investigate their DC sweeping characteristics to act as either a selector or RRAM device. Furthermore, reliability tests for both selector and RRAM devices were also conducted to confirm their switching stabilities. Finally, current fitting methods and temperature influence experiments were performed to investigate the carrier transport mechanisms. Finally, physical models were proposed to illustrate the selector property and RS mechanism for selector and RRAM devices, respectively. This simple device structure with its easy operating method accomplishes a significant advancement of devices combining both selector properties and RRAM for remarkable real applications in the near future.
Effect of charge quantity on conduction mechanism of high-and low-resistance states during forming process in a one-transistor-one-resistor resistance random access memory
(2017-05-01)
Wu, Cheng-Hsien
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Chang, Kuan-Chang
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Chu, Tian-Jian
The forming process is a necessary and irreversible process to activate the resistance switching behavior in a resistance random access memory (RRAM) device. However, during the forming process, an overshoot current leads to device damage and causes inferior resistance switching characteristics; consequently, the process is considered to be a key factor in device degradation. In this paper, we find that a discontinuous conduction path can be formed by a pulse forming process such that the operation current can be reduced. We further investigate how the charge quantity during the forming process affects the carrier conduction mechanism of HRS, with all experiments and results demonstrated on onetransistor- one-resistor (1T1R) devices. (C) 2017 The Japan Society of Applied Physics
Effect of ELA Energy Density on Self-Heating Stress in Low-Temperature Polycrystalline Silicon Thin-Film Transistors
(2020-08-01)
Huang, Shin-Ping
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Chen, Hong-Chih
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Chen, Po-Hsun
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Zheng, Yu-Zhe
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Chu, Ann-Kuo
The extent of the poly-silicon crystalline protrusion, a result of differences in excimer laser annealing (ELA), affects the performance and reliability of thin-film transistors (TFTs). This study investigates the degradation mechanism of the low-temperature polycrystalline silicon (LTPS) TFT devices with differences in crystalline protrusion under self-heating stress (SHS). Higher ELA energy will induce higher protrusion height in the interface between the poly-silicon and gate insulator (GI). This surface morphology leads to serious charge trapping into the GI layers; in contrast, the smallest degradation after SHS can be seen in the devices with the lowest protrusion height. This indicates that the degradation is caused by the surface morphology between the poly-Si and GI interface. In addition, the COMSOL simulation results confirm that the large electric field in the GI layer appears in the rough surface morphology devices; therefore, choosing the appropriate ELA energy of the poly-Si is beneficial for the applications of the driving TFT in organic light-emitting diode (OLED) display in the manufacturing industry.
Effects of erbium doping of indium tin oxide electrode in resistive random access memory
(2016-03)
Chen, Po-Hsun
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Chang, Kuan-Chang
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Pan, Chih-Hung
Identical insulators and bottom electrodes were fabricated and capped by an indium tin oxide (ITO) film, either undoped or doped with erbium (Er), as a top electrode. This distinctive top electrode dramatically altered the resistive random access memory (RRAM) characteristics, for example, lowering the operation current and enlarging the memory window. In addition, the RESET voltage increased, whereas the SET voltage remained almost the same. A conduction model of Er-doped ITO is proposed through current-voltage (I-V) measurement and current fitting to explain the resistance switching mechanism of Er-doped ITO RRAM and is confirmed by material analysis and reliability tests. (C) 2016 The Japan Society of Applied Physics
Engineering interface-type resistance switching based on forming current compliance in ITO/Ga2O3: ITO/TiN resistance random access memory: Conduction mechanisms, temperature effects, and electrode influence
(2016-10-31)
Pan, Chih-Hung
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Chang, Kuan-Chang
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Chen, Po-Hsun
In this paper, an ITO/Ga2O3: ITO/TiN structured resistance random access memory is introduced. Either interface or filament conduction mechanism can be induced depending on the forming compliance current, which has not been investigated before. Material analyses and electrical I-V measurements on this ITO/Ga2O3: ITO/TiN have also been carried out. The interface conduction mechanism was confirmed by a size-effect experiment, where resistance varied inversely to via size. In addition, the current fitting results show that Schottky emission dominates the on-and off-state currents. All physical mechanisms of device resistive switching behaviors are explained by our models and also confirmed by I-V characteristics. Published by AIP Publishing.
Enhancement of Mechanical Bending Stress Endurance Using an Organic Trench Structure in Foldable Polycrystalline Silicon TFTs
(2020-05-01)
Zheng, Yu-Zhe
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Huang, Shin-Ping
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Chen, Po-Hsun
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Chang, Ting-Chang
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Tsai, Tsung-Ming
This letter proposes a new organic trench structure which can enhance the endurance of polycrystalline silicon thin film transistors (TFTs) under mechanical bending stress. It compares conventional structure TFTs to devices with an organic trench to examine reliability after undergoing 100,000 iterations of channel width-axis (100,000'WC) compression at R = 2mm. Due to the low Young's modulus of organic materials, stress while undergoing bending strain is desorbed to the buffer layer, which can lower the overall stress in TFTs. Furthermore, an optimal location and ideal length for such an organic trench is evaluated by mechanical bending simulation.
Enhancement of Surface Chemical and Physical Properties of Germanium-Sulfur Thin Film Using a Water-Supplemented Carbon Dioxide Supercritical Fluid Treatment Technique
(2018-11-09)
Yang, Chih-Cheng
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Chen, Po-Hsun
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Shih, Chih-Cheng
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Wang, Ming-Hui
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Tsai, Tsung-Ming
In this study, an oxidation treatment technique suitable for the material and electronic device applications proceeding at low temperature (only 80 degrees C) and high pressure (3000 psi) utilizing a carbon dioxide (CO2) supercritical fluid (SCF), also known as scCO(2), which is supplemented with water molecules, is reported. To demonstrate the possible effects on material and devices for the proposed SCF treatment, an amorphous germanium-sulfur (GeS) thin film and a GeS-based resistance random access memory (RRAM) device are prepared. After the SCF treatment, electrical measurements confirm that the GeS-based RRAM device exhibits a lower forming voltage, more stable resistance switching characteristics, and higher concentration distributions of high and low resistance states when compared to the device without SCF treatment. As for the material effects, both chemical and physical properties are examined based on material analyses results. It is concluded that the original amorphous GeS thin film transforms to a polycrystallized GeO film, confirmed by a reaction model for the SCF treatment illustrating possible oxidation and crystallization effects induced by this SCF treatment. This water-enhanced scCO(2) SCF treatment technique, thus, shows its capability as a feasible synthetic method for material modification as well as suitability for device level applications.
Impact of Dehydrogenation Annealing Process Temperature on Reliability of Polycrystalline Silicon Thin Film Transistors
(2019-10-01)
Huang, Shin-Ping
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Chen, Po-Hsun
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Chen, Hong-Chih
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Zheng, Yu-Zhe
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Chu, Ann-Kuo
This letter investigates variations in polycrystalline silicon thin film transistor (TFT) performance under illumination and negative bias temperature instability (NBTI) tests due to different dehydrogenation annealing temperatures during the fabrication process. The depth of the density of state (DOS) in polysilicon can be indirectly determined by the TFT response to light illumination, since dangling bonds act as recombination centers. The electrical characteristics of TFTs after undergoing NBTI can also be indicative of the bonding type of silicon atoms. By analyzing the results of these reliability tests, the type of DOS can be clarified, which is beneficial for realizing the relationship between performance and reliability.
Improving Performance by Doping Gadolinium Into the Indium-Tin-Oxide Electrode in HfO2-Based Resistive Random Access Memory
(2016-05)
Chen, Po-Hsun
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Chang, Kuan-Chang
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Pan, Chih-Hung
This letter investigates the characteristics of doping gadolinium (Gd) in an indium-tin-oxide (ITO) electrode in HfO2-based resistive random access memory (RRAM). Identical bottom electrodes and insulators were made but then capped by either pure ITO or a Gd: ITO top electrode. Doping Gd in the ITO electrode produces lower operation currents in both high-resistance state (HRS) and low-resistance state (LRS) as well as enlarging the memory window. This excellent performance suggests a remarkable potential to improve RRAM applications. Schottky emission mechanism dominates both HRS and LRS according to current fitting results, and is confirmed by temperature effect experiments. The resistive switching behavior of the Gd:ITO device is explained by our model and is also confirmed by material analysis and electrical measurements. Furthermore, reliability tests verify the Gd: ITO device\'s capability to perform data storage as a nonvolatile memory.
Incorporation of Resistive Random Access Memory into Low-Temperature Polysilicon Transistor with Fin-Like Structure as 1T1R Device
(1970-01-01)
Huang, Wei-Chen
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Zheng, Hao-Xuan
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Chen, Po-Hsun
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Chang, Ting-Chang
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Tan, Yung-Fang
In this study, a one transistor one resistor (1T1R) structure combining a fin-like low-temperature polycrystalline-silicon (LTPS) transistor and a resistive random access memory (RRAM) is successfully fabricated. For the fin-like LTPS transistor, both n-type and p-types show excellent electrical output characteristics. Fin-like structure produces more stable output characteristics. Also, the forming and current-voltage (I-V) characteristics are measured in this study, and the RRAM exhibits a forming voltage of about -1.9 V. As for the I-V switching property, the devices are stable and show excellent performance, with the set and reset voltages showing only minimal change over 100 cycles. Moreover, combining the fin-like LTPS transistor and RRAM into a 1T1R structure results in favorable operation over 100 cycles, with excellent retention and endurance. According to these results, RRAM can be successfully combined with a fin-like LTPS transistor for application in current integrated circuit processes without difficulty.
Inert Pt electrode switching mechanism after controlled polarity-forming process in In2O3-based resistive random access memory
(2017-09-01)
Wu, Cheng-Hsien
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Pan, Chih-Hung
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Chen, Po-Hsun
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Chang, Ting-Chang
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Tsai, Tsung-Ming
In this study, we demonstrate a forming technique that enables us to control whether the switching layer of a Pt/In2O3/TiN device is near the Pt electrode or the TiN electrode. This means that In2O3-based resistive random access memory (RRAM) can be switched at either the active or inert electrode. The resistive switching current-voltage (I-V) curves for both electrodes exhibit stable memory windows. Through material and electrical analyses, we found that the reason for switching at the inert electrode is the oxygen-vacancy-rich characteristic of In2O3. Finally, a physical model is proposed to explain this phenomenon. (C) 2017 The Japan Society of Applied Physics
Investigating Material Changes at Different Gadolinium Doping Power Levels in Indium-Tin Oxide Intended for Use as an Insulator in Resistive Switching Memory
(2019-06-01)
Lin, Chun-Chu
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Chen, Po-Hsun
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Chen, Min-Chen
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Chang, Ting-Chang
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Lin, Chih-Yang
This paper investigates material modifications induced by cosputtering indium-tin oxide (ITO) with gadolinium (Gd) at two different power levels. In addition, resistance switching (RS) properties were also verified for use as an insulator in resistive random access memory (RRAM). Comparison of scanning electron microscope (SEM) measurements for the two different cosputtering powers indicated significant changes of the ITO surface. Transparency was also verified by an N&K analyzer measurement, with results indicating a constant in transparency induced by the lower power Gd doping, indicating potential for transparent applications. Furthermore, the mole fraction ratio defined by X-ray photoelectron spectroscopy reveals a Gd2O3 peak, a likely reason for the ITO thin film becoming less conductive. This ITO/Gd:ITO/TiN RRAM can exhibit stable and robust RS characteristics at a lower forming voltage. In addition, lower operating voltages, including both SET and RESET voltages, can be obtained. Reliability tests including endurance and retention were carried out to confirm its RS stability. The RS mechanism of this ITO/Gd:ITO/TiN device was also investigated with the current-voltage (I-V) fitting method. Moreover, temperature effects were also applied to verify the high-resistance state (HRS) mechanism. Finally, a conduction model was proposed to clarify the RS characteristics and confirm that the ITO/Gd:ITO/TiN device is appropriate for data storage.
Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment
(2019-10-30)
Chen, Hong-Chih
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Kuo, Chuan-Wei
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Chang, Ting-Chang
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Lai, Wei-Chih
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Chen, Po-Hsun
In this study, the impact of moisture on the electrical characteristics of an amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) was investigated. In commercial applications of such TFTs, high stability and quality performance in humid environments are essential. During TFT operation under ambient moisture, the electrolysis of water molecules occurs via the tip electric field effect. Hydrogen diffuses from the etch-stop layer or back-channel into the main channel under a negative electric field. The hydrogen atoms act as shallow donors (which causes the carrier concentration in the channel to rise), causing the threshold voltage (V-TH) to shift in the negative direction. Hydrogen diffusion from the overlap of the source/drain and gate electrodes to the channel center caused by the tip electric field induces a significant barrier lowering and V-TH shifts in a short-channel device. However, under negative bias stress (NBS) in ambient moisture, the negative V-TH shift is more obvious in short- than in long-channel devices, indicating suppressed hydrogen diffusion in long-channel devices. This is attributed to the electrolysis of water by the tip electric field at the source, drain, and gate electrodes, which causes hydrogen to diffuse to the center of the channel. Here, a novel physical model of the capacitance-voltage (C-V) electrical property changes under ambient moisture is proposed, based on the early appearance of abnormalities in the C-V measurements. The electrolysis of water caused by the tip electric field and electrical abnormalities caused by hydrogen diffusion into the a-IGZO active layer are explained by this model. A secondary-ion mass spectrometry analysis shows that hydrogen content in the channel generally increases under NBS in ambient moisture. The degradation behavior due to moisture in a-IGZO is clarified. Thus, inhibiting the tip electric field may benefit future flexible-display and gas-sensing applications.
Investigation of the forming process under UV illumination in HfO2-based resistance random access memory with a transparent electrode
(2020-01-09)
Huang, Wei-Chen
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Huang, Shin-Ping
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Chen, Po-Hsun
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Chen, Min-Chen
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Chang, Ting-Chang
Traditionally, metal is used for the top electrode (TE) in HfO2-based resistance random access memory. When transparent indium-tin-oxide (ITO) is used as the TE, different forming processes, including lower forming voltages and higher forming currents, are exhibited. This work investigates the forming process with such a transparent TE under UV illumination. In addition, different TE thicknesses and device cell sizes are also investigated to confirm the results. Finally, a possible conduction model is provided to explain the mechanisms under UV-light illumination for the transparent TE during the forming process.
Modifying Indium-Tin-Oxide by Gas Cosputtering for Use as an Insulator in Resistive Random Access Memory
(2016-11)
Chen, Po-Hsun
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Chang, Kuan-Chang
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Chang, Ting-Chang
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Tsai, Tsung-Ming
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Pan, Chih-Hung
In this paper, indium-tin-oxide (ITO) was used to act as both insulator and top electrode in resistive random access memory (RRAM) on identical bottom substrates. This is achieved by cosputtering an ITO target with nitride (N-2) or oxygen (O-2) gas as the insulator; then capping by an ITO electrode, such that both the rectifier and RRAM characteristics can be achieved before and after a forming process, respectively. In contrast, using pure ITO as an insulator does not exhibit RRAM behavior. To verify the rectifier and RRAM characteristics, material analyses and electrical measurements at various temperatures were conducted. Reliability tests including retention and endurance were also applied to verify the resistance switching stability. Finally, the rectifier and RRAM conduction models were proposed to examine the resistance switching behaviors. By applying the ITO material as both electrode and insulator, the resistance switching characteristic with high reliability is thus obtained.
Obtaining Lower Forming Voltage and Self-Compliance Current by Using a Nitride Gas/Indium-Tin Oxide Insulator in Resistive Random Access Memory
(2016-12)
Chen, Po-Hsun
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Chang, Ting-Chang
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Chang, Kuan-Chang
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Tsai, Tsung-Ming
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Pan, Chih-Hung
This paper investigates the characteristics of applying indium-tin oxide (ITO) with and without nitride gas (N-2) as the insulator in resistive random access memory (RRAM). After cosputtering an ITO target with N-2 as the insulator and capping the same ITO material as the top electrode, the device exhibits rectifier and resistance switching characteristics before and after the forming process, respectively. The Schottky diodelike rectifier mechanism was also verified by various temperature measurements. Furthermore, robust resistance switching at a positive forming voltage, smaller than that required during negative bias forming, can be achieved. Both positive and negative forming processes are examined with current fitting results, which show different dominant mechanisms when using positive or negative biases. All these mechanisms have also been verified by temperature effect experiments, which confirmed the dominant conduction mechanisms. This, in combination with the fact that the positive forming voltage itself is smaller than the negative forming voltage, and decreases with device scale down, provides two highly beneficial results. This good performance achieved by using ITO with N-2 suggests significant progress of RRAM and remarkable potential applications.