Browsing by Author "Chen, Shih-Ching"

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A low-temperature method for improving the performance of sputter-deposited ZnO thin-film transistors with supercritical fluid
(2009-04-20)
Chen, Min-Chen
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Chang, Ting-Chang
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Huang, Sheng-Yao
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Chang, Kuan-Chang
;
Li, Hung-Wei
A low-temperature method, supercritical CO(2) (SCCO(2)) fluid technology, is employed to improve the device properties of ZnO TFT at 150 degrees C. In this work, the undoped ZnO films were deposited by sputter at room temperature and treated by SCCO(2) fluid which is mixed with 5 ml pure H(2)O. After SCCO(2) treatment, the on/off current ratios and threshold voltage of the device were improved significantly. From x-ray photoelectron spectroscopy analyses, the enhancements were attributed to the stronger Zn-O bonds, the hydrogen-related donors, and the reduction in dangling bonds at the grain boundary by OH passivation.
A novel nanowire channel poly-Si TFT functioning as transistor and nonvolatile SONOS memory
(2007-09-01)
Chen, Shih-Ching
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Chang, Ting-Chang
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Liu, Po-Tsun
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Wu, Yung-Chun
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Lin, Po-Shun
In this letter, a polycrystalline silicon thin-film transistor consisting of silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire (NW) channels was investigated for the applications of transistor and nonvolatile memory. The proposed device, which is named as NW SONOS-TFT, has superior electrical characteristics of transistor, including a higher drain current, a smaller threshold voltage (V-th), and a steeper subthreshold slope. Moreover, the NW SONOS-TFT also can exhibit high program/erase efficiency under adequate bias operation. The duality of both transistor and memory device for the NW SONOS-TFT can be attributed to the trigate structure and channel corner effect.
Analysis of Anomalous Capacitance Induced by TAGIDL in p-Channel LTPS TFTs
(2010)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
;
Li, Hung-Wei
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Chen, Shih-Ching
In this work, a mechanism of anomalous capacitance in p-channel low temperature polycrystalline silicon thin film transistors (LTPS TFTs) was investigated. In general, the effective capacitance of the LTPS TFTs was only dependent with the overlap area between the gate and source/drain under the off-state. However, the experimental results reveal that the off-state capacitance was increased with decreasing measurement frequency and/or with increasing measurement temperature. By fitting the curve of the drain current vs electric field under off-state region, it was verified that the trap-assisted gate-induced drain leakage (TAGIDL) consists of the Pool-Frenkel emission and thermal field emission. In addition, the charge density calculated from the C(gsd)-V(g) measurement also has the same dependence with electric field. This result demonstrates that the anomalous capacitance is mainly due to the TAGIDL. To suppress the anomalous capacitance, a band-to-band hot electron stress was utilized to reduce the vertical electric field between the gate and the drain. The electric field simulation was also performed by TCAD software. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3483759] All rights reserved.
Analysis of Degradation Mechanism in SONOS-TFT Under Hot-Carrier Operation
(2010-12-01)
Chen, Te-Chih
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Chang, Ting-Chang
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Chen, Shih-Ching
;
Hsieh, Tien-Yu
;
Jian, Fu-Yen
This letter investigates the degradation mechanism of polycrystalline silicon thin-film transistors with a silicon-oxide-nitride-oxide-silicon structure under OFF-state stress. During the electrical stress, the hot hole generated from band-to-band tunneling process will inject into gate dielectric, and the significant ON-state degradation (more than 1 order) indicates that the interface states are accompanied with hot-hole injection. In addition, the asymmetric I-V characteristics indicate that the interface states are located near the drain side. Moreover, the ISE-TCAD simulation tool was utilized to model the degradation mechanism and analyze trap states distribution. Although both the vertical and lateral electrical fields are factors for degradation and hot-hole injection, the degradation is mainly affected by the lateral electrical field over a critical point.
Anomalous Capacitance Induced by GIDL in P-Channel LTPS TFTs
(2009-11-01)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
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Chen, Shih-Ching
;
Jian, Fu-Yen
In this letter, a mechanism of anomalous capacitance in p-channel low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) was investigated. In general, the effective capacitance was only the overlap region and independent with the frequency in LTPS TFTs under the OFF state. However, our experimental results reveal that the capacitance was related with the leakage current and that it was dependent with the measurement frequencies when operated at the OFF-state region. The increase of the capacitance value is verified to be due to the increase of the electron capacitance originating from a gate-induced drain-leakage (GIDL) one. Nevertheless, the GIDL-induced electron capacitance can be suppressed by employing band-to-band hot electron stress.
Bias-induced oxygen adsorption in zinc tin oxide thin film transistors under dynamic stress
(2010-06-28)
Chen, Yu-Chun
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Chang, Ting-Chang
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Li, Hung-Wei
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Chen, Shih-Ching
;
Lu, Jin
This study investigates the effects of bias-induced oxygen adsorption on the electrical characteristic instability of zinc tin oxide thin film transistors in different ambient oxygen partial pressures. When oxygen pressure is largest, the threshold voltages showed the quickest increase but the slowest recovery during the stress phase and recovery phase, respectively. This finding corresponds to the charge trapping time constant and recovery time constant, which are extracted by fitting the stretched-exponential equation and which exhibit a relationship with oxygen pressure. We suggest that the gate bias reduces the activation energy of oxygen adsorption during gate bias stress. (C) 2010 American Institute of Physics. [doi: 10.1063/1.3457996]
Bipolar Resistive Switching Characteristics of Transparent Indium Gallium Zinc Oxide Resistive Random Access Memory
(2010)
Chen, Min-Chen
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Chang, Ting-Chang
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Huang, Sheng-Yao
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Chen, Shih-Ching
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Hu, Chih-Wei
This study investigates a sputtered InGaZnO (IGZO) thin film to apply into a resistive random access memory device. After the formation of an indium tin oxide (ITO)/IGZO/ITO structure at room temperature, the device exhibits a repeatable bipolar resistance switching behavior without an electroforming process and an excellent transmittance in the visible region. The conduction mechanisms for low and high resistance states are dominated by Ohm's law and space-charge-limited current behavior, respectively. In retention and endurance tests, a resistance ratio of more than 1 order remains after 10(4) s at 90 degrees C and after 100 dc voltage sweeping cycles. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3360181] All rights reserved.
Bipolar resistive switching of chromium oxide for resistive random access memory
(2011-08-01)
Chen, Shih-Cheng
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Chang, Ting-Chang
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Chen, Shih-Yang
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Chen, Chi-Wen
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Chen, Shih-Ching
This study investigates the resistance switching characteristics of Cr(2)O(3)-based resistance random access memory (RRAM) with Pt/Cr(2)O(3)/TiN and Pt/Cr(2)O(3)/Pt structures. Only devices with Pt/Cr(2)O(3)/TiN structure exhibit bipolar switching behavior after the forming process because TiN was able to work as an effective oxygen reservoir but Pt was not. Oxygen migration between Cr(2)O(3) and TiN was observed clearly before and after resistance switching from Auger electron spectroscopy (AES) analysis. Both low resistance state, ON state, and high resistance state, OFF state, of Pt/Cr(2)O(3)/TiN structures are stable and reproducible during a successive resistive switching. The resistance ratio of ON and OFF state is over 10(2), on top of that, the retention properties of both states are very stable after 10(4) s with a voltage of -0.2 V. (C) 2010 Elsevier Ltd. All rights reserved.
Characteristics of poly-Si TFT combined with nonvolatile SONOS memory and nanowire channels structure
(2007-12-15)
Chen, Shih-Ching
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Chang, Ting-Chang
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Liu, Po-Tsun
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Wu, Yung-Chun
;
Lin, Po-Shun
In this work, we study a polycrystalline silicon thin-film transistor (poly-Si TFT) combined with a silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire channels structure for the applications of transistor and nonvolatile memory. The proposed device named with NW SONOS-TFT has superior electrical characteristics of transistor and also can exhibit high program/erase (P/E) efficiency under adequate bias operation. The V-th decreases from 2.45 V to 1.76 V and subthreshold swing reduces from 0.57 V/decade to 0.42 V/decade. The programming V-th shift is improved from 2.2 V to 3.3 V at 14 V for 1 s and the erasing V-th shift is improved from -0.3 V to -1.3 V at -14 V for 1 s. The dramatic improvement can be attributed to the tri-gate structure and corner effect. In addition, the memory device has a promising data retention behavior at 85 degrees C and a 0.8 V memory window after 5 x 10(3) P/E cycles operations. Hence, the NW SONOS-TFT is suitable for application in the future system-on-panel display. (C) 2007 Elsevier B.V. All rights reserved.
Charge storage characteristics of high density Mo nanocrystal embedded in silicon oxide and silicon nitride
(2010-02-24)
Lin, Chao-Cheng
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Chang, Ting-Chang
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Tu, Chun-Hao
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Chen, Shih-Ching
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Hu, Chih-Wei
We investigated the formation and charge storage characteristics of Mo nanocrystals in silicon oxide and in silicon nitride by rapid thermal annealing of oxygen- and nitrogen-incorporated Mo and Si mixed layers. A high density of Mo nanocrystal (6 x 10(12) cm(-2)) was formed in the nitrogen-incorporated layer. Electrical analyses indicated that the memory window of the Mo nanocrystal embedded in the nitride is larger than that in the oxide. A reliability test showed that the Mo nanocrystal in the nitride has better reliability than the Mo nanocrystal in the oxide, which was explained by an electrical field simulation.
Charge-Trapping-Induced Parasitic Capacitance and Resistance in SONOS TFTs Under Gate Bias Stress
(2011-03-01)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
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Jian, Fu-Yen
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Li, Hung-Wei
This letter investigates the charge-trapping-induced parasitic resistance and capacitance in silicon-oxide-nitride-oxide-silicon thin-film transistors under positive and negative dc bias stresses. The results identify a parasitic capacitance in OFF-state C-V curve caused by electrons trapped in the gate insulator near the defined gate region during the positive stress, as well as the depletion induced by those trapped electrons. Meanwhile, the induced depletions in source/drain also degraded the I-V characteristic when the gate bias is larger than the threshold voltage. However, these degradations slightly recover when the trapped electrons are removed after negative bias stress. The electric field in the undefined gate region is also verified by TCAD simulation software.
Degradation of Low Temperature Polycrystalline Silicon Thin Film Transistors under Negative Bias Temperature Instability Stress with Illumination Effect
(2010)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
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Li, Hung-Wei
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Hsu, Wei-Che
This work investigates negative bias temperature instability (NBTI) in low temperature polycrystalline silicon thin film transistors (LTPS TFTs) in a darkened and in an illuminated environment of different light intensities. Experimental results reveal that the generations of interface state density (N(it)) are identical under various illuminated intensity NBTI stresses. Nevertheless, the degradation of the grain boundary trap (N(trap)) under illumination was more significant than that for the darkened environment, with degradation increasing as illumination intensity increases. This phenomenon is mainly caused by the extra number of holes generated during the illuminated NBTI stress. The increased N(trap) degradation leads to an increase in the darkened environment leakage current. This indicates that more traps are generated in the drain junction region than from carrier tunneling via the trap, resulting in leakage current. Conversely, an increase in N(trap) degradation results in a decrease in the photoleakage current. This indicates that the number of recombination centers increases in the poly-Si bulk, affecting photosensitivity in LTPS TFTs.
Enhanced gate-induced floating-body effect in PD SOI MOSFET under external mechanical strain
(2010-11-25)
Dai, Chih-Hao
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Chang, Ting-Chang
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Chu, Ann-Kuo
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Kuo, Yuan-Jui
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Chen, Shih-Ching
The influence of tensile mechanical strain on gate-induced floating-body effect (GIFBE) in advanced partially depleted SOI n-MOSFETs was investigated. Both drain current and mobility enhance after applying strain due to the reduction of average transfer effective mass. However, it was found that the GIFBE becomes serious under the mechanical strain. To explain this phenomenon, we first clarify the mechanism of GIFBE using different operation conditions. The experiment results indicate that the GIFBE can be attributed to the anode hole injection (AHI) rather than the widely accepted mechanism of electron band (EVB) tunneling. Based on the AHI model, the enhanced GIFBE under the mechanical strain is mainly due to the narrowing of band gap induced by the strain in the poly-gate. (C) 2010 Elsevier B.V. All rights reserved.
Environment-dependent thermal instability of sol-gel derived amorphous indium-gallium-zinc-oxide thin film transistors
(2011-04-11)
Chung, Wan-Fang
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Chang, Ting-Chang
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Li, Hung-Wei
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Chen, Shih-Ching
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Chen, Yu-Chun
The environment-dependent electrical performances as a function of temperature for sol-gel derived amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors are investigated in this letter. In the ambients without oxygen, thermal activation dominates and enhances device performance. In oxygen-containing environments, mobility and drain current degrades and the threshold slightly increase as temperature increases. We develop a porous model for a-IGZO film relating to the drain current and mobility lowering due to film porosity and oxygen adsorption/penetration. It also relates to the threshold voltage recovery at high temperature owing to the varying form of adsorbed oxygen and the combination of oxygen and vacancies. (C) 2011 American Institute of Physics. [doi:10.1063/1.3580614]
Formation and composition of titanium oxinitride nanocrystals synthesized via nitridizing titanium oxide for nonvolatile memory applications
(2011-09-01)
Feng, Li-Wei
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Chang, Chun-Yen
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Chang, Ting-Chang
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Tu, Chun-Hao
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Wang, Pai-Syuan
Formation and composition analyses of titanium oxinitride nanocrystals (NCs) fabricated via treating a magnetron co-sputtered thin film of titanium and silicon dioxide with a rapid thermal annealing in nitrogen ambient were demonstrated for nonvolatile memory applications. Phase separation characteristics with different annealing conditions were examined by transmission electron microscopy and chemical bonding characteristics were confirmed by X-ray photon emission spectra. It was observed that a blanket layer composed mainly of titanium oxide was still present as annealing temperature was increased to 700 degrees C, associated with the thermodynamically stable phase of titanium oxide. Furthermore, a higher thermal treatment of 900 degrees C induced formation of a well-separated NC structure and caused simultaneously partial nitridation of the titanium oxide, thereby forming titanium oxinitride NCs. A significant capacitance-voltage hysteresis in threshold voltage shift at 1 V was easily achieved under a small sweeping voltage range of + 2 V/-2 V, and a memory window retention of 2.2 V was obtained after 10(7) s by extrapolation under a 1 s initial-program/erase condition of +5 V/-5 V, respectively. (C) 2011 Elsevier B.V. All rights reserved.
H(2)O-Assisted O(2) Adsorption in Sol-Gel Derived Amorphous Indium Gallium Zinc Oxide Thin Film Transistors
(2011-01-01)
Chung, Wan-Fang
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Chang, Ting-Chang
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Li, Hung-Wei
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Chen, Shih-Ching
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Chen, Yu-Chun
This paper investigates the environmental effects and related adsorbent species reactions on sol-gel derived amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFTs). The discrepancy between device characteristics measured in atmospheric and vacuum conditions was clarified through experiments with thermal annealing and different gas partial pressures. The measurement of a-IGZO TFTs in simulated water vapor environment was also utilized. We verified that the adsorbed water originating from the surrounding atmosphere can cause an increase in off-current and also enhance more oxygen molecule adsorption on the exposed back-channel surface, leading to more serious degradation in on-current. (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3568831] All rights reserved.
H2O-Assisted O-2 Adsorption in Sol-Gel Derived Amorphous Indium Gallium Zinc Oxide Thin Film Transistors
(2011-01-01)
Chung, Wan-Fang
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Chang, Ting-Chang
;
Li, Hung-Wei
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Chen, Shih-Ching
;
Chen, Yu-Chun
This paper investigates the environmental effects and related adsorbent species reactions on sol-gel derived amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFTs). The discrepancy between device characteristics measured in atmospheric and vacuum conditions was clarified through experiments with thermal annealing and different gas partial pressures. The measurement of a-IGZO TFTs in simulated water vapor environment was also utilized. We verified that the adsorbed water originating from the surrounding atmosphere can cause an increase in off-current and also enhance more oxygen molecule adsorption on the exposed back-channel surface, leading to more serious degradation in on-current. (C) 2011 The Electrochemical Society. [DOI: 10.1149/1.3568831] All rights reserved.
High-performance polycrystalline silicon thin-film transistors with oxidenitride-oxide gate dielectric and multiple nanowire channels
(2006-11-25)
Chen, Shih-Ching
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Chang, Ting-Chang
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Liu, Po-Tsun
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Wu, Y. C.
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Tsai, C. C.
This work presents a method to enhance the performance of polycrystalline silicon thin film transistors (poly-Si TFTs) by using an oxide-nitride-oxide (ONO) gate dielectric and the multiple nanowire channels structure. Experimental results indicate that the performance of the device was enhanced by using the ONO multilayer, because the ONO gate dielectric constant is increased compared to the conventional oxide gate dielectric. Additionally, the TFTs with a ten nanowire channel structure (NW-TFTs) have superior electrical characteristics compared to other TFTs. This is because a structure with more corners and a shorter radius has better gate control due to the corner effect. (c) 2006 Elsevier B.V. All rights reserved.
High-stability oxygen sensor based on amorphous zinc tin oxide thin film transistor
(2012-06-25)
Chen, Yu-Chun
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Chang, Ting-Chang
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Li, Hung-Wei
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Chung, Wan-Fang
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Wu, Chang-Pei
This research presents a sol-gel derived zinc tin oxide thin film transistor (TFT) as a high-stability oxygen sensor. Due to its high sensitivity, oxygen has been traditionally regarded as having a negative influence on the electrical characteristics of zinc-based TFTs; however, TFTs can also act as an oxygen sensor. After illumination with visible light in oxygen-rich ambient, a significant increase in drain current of nearly 10 4 times occurs with fixed gate and drain voltages. It is expected that an optimized method of illumination can help to reset the electrical characteristics or distinguish the on/off state of this reliable oxygen sensor. (C) 2012 American Institute of Physics. [ http://dx.doi.org/10.1063/1.4731773]
Illumination-Assisted Negative Bias Temperature Instability Degradation in Low Temperature Polycrystalline Silicon Thin-Film Transistors
(2009)
Lin, Chia-Sheng
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Chen, Ying-Chung
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Chang, Ting-Chang
;
Hsu, Wei-Che
;
Chen, Shih-Ching
In this work, the negative bias temperature instability (NBTI) in low temperature polycrystalline silicon thin-film transistors in a darkened and in an illuminated environment was investigated. Experimental results reveal that the generation of interface state density (N(it)) showed no change between the different NBTI stresses. Nevertheless, the degradation of the grain boundary trap (N(trap)) under illumination was more significant than that in the darkened environment. This phenomenon is mainly caused by the extra number of holes generated during the illuminated NBTI stress.