Browsing by Author "Chen, WT"

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A spread spectrum clock generator for SATA-II
(2005)
Chen, WT
;
Hsu, JC
;
Lune, HW
;
Su, CC
;
電控工程研究所
In this paper, we proposed a spread spectrum clock generator (SSCG) for the Serial AT Attachment Generation 2 (SATA-II). We use a fractional-N PLL to accomplish the spread spectrum function. The SSCG integrates a conventional PLL, a digital 3(rd) order MASH 1-1-1 delta-sigma modulator and an address generator. The SSCG generates clocks at 1.5 GHz, a 5000 ppm down spread with a triangular waveform frequency modulation of 33 KHz. The circuit has been simulated in 0.18 um CMOS technology. The non spread spectrum clocking has a jitter of 80 ps and the peak amplitude reduction is 23.44 dBm in spread spectrum mode. The power dissipation from a 1.8 V supply is 55 mW.
Decentralized energy-conserving and coverage-preserving protocols for wireless sensor networks
(2005)
Huang, CF
;
Lo, LC
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Tseng, YC
;
Chen, WT
;
資訊工程學系
The wireless sensor network is an emerging technology that may greatly facilitate human life by providing ubiquitous sensing, computing, and communication capability. However, to maintain sufficient coverage and to achieve long system lifetime are two contradicting factors in designing the topology of a sensor network. In this paper, we propose several decentralized protocols that schedule sensors' active and sleeping periods to prolong the network lifetime while maintain the sensing field sufficiently covered. The proposed protocols are based on a model similar to that of [8], but improve the results of [8] In several senses. First, our approach can significantly reduce the computational complexity incurred, and at the same time achieve better accuracy in determining the coverage of the sensing area. Second, we further enhance the results of [8] by proposing an optimization mechanism to further balance or reduce sensors' energy expenditure.
Fabrication of trench-gate power MOSFETs by using a dual doped body region
(2004-07-01)
Juang, MH
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Chen, WT
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Ou-Yang, CI
;
Jang, SL
;
Lin, MJ
Fabrication of trench-gate power MOSFETs by using a dual doped body region has been proposed to further improve the device performance. For the usual scheme that employs a uniform doped body region, a device with a blocking voltage larger than 30 V and a specific on-state resistance of about 1.0 Omegacm can be obtained via the proper choice of trench depth, epitaxial thickness, and body doping concentration. On the other hand, a dual doped body region is produced by dual high-energy and low-energy implantation of boron dopant. By this scheme, a device with a blocking voltage larger than 30 V and a specific on-state resistance of about 0. 8 Omegacm can be further achieved. Hence, with reducing the cell pitch size to be below 2 mum, this device fabrication scheme should be promising and practical for achieving a specific on-resistance smaller than 0. 1 mOmegacm2 and a blocking voltage higher than 30 V. (C) 2004 Elsevier Ltd. All rights reserved.
Fluorometric assay for alcohol sulfotransferase
(2005-04-01)
Chen, WT
;
Liu, MC
;
Yang, YS
;
生物科技學系
;
Department of Biological Science and Technology
A sensitive fluorometric assay was developed for alcohol sulfotransferase (AST). This was the first continuous fluorometric assay reported for AST. It used 3 '-phosphoadenosine 5 '-phosphosulfate regenerated from 3-phosphoadenosine 5 '-phosphate by a recombinant phenol sulfotransferase (PST) using 4-methylumbelliferyl sulfate as the sulfuryl group donor. The recombinant PST did not use the alcohol substrate under the designed condition, and the sensitivity for AST activity was found to be comparable to that of radioactive assay as reported in the literature. The change of fluorescence intensity of 4-methylumbelliferone corresponded directly to the amount of active AST and was sensitive enough to measure nanogram or picomole amounts of the enzyme activity. This fluorometric assay was used to determine the activities of AST as purified form and in crude extracts of pig liver, rat liver, and Escherichia coli. Some properties of human dehydroepiandrosterone sulfotransferase were determined by this method and were found to be comparable to published data. Under similar assay conditions, the contaminated activities of arylsulfatase in crude extracts were also determined. This method not only is useful for the routine and detailed kinetic study of this important class of enzymes but also has the potential for the development of a high-throughput procedure using microplate reader. (c) 2004 Elsevier Inc. All rights reserved.
Integrating mobile IP with ad hoc networks
(2003-05-01)
Tseng, YC
;
Shen, CC
;
Chen, WT
;
交大名義發表
;
National Chiao Tung University
The Internet Engineering Task Force's mobile Internet protocol uses mobile agents to support. seamless handoffs, making it possible for mobile hosts to roam from subnet to subnet without changing IP addresses. Another emerging wireless architecture, mobile ad hoc networks (Manets), can be flexibly deployed in most environments without the need for infrastructure base stations. Integrating these two architectures will facilitate the current trend of moving to an all-IP wireless environment. By supporting greater roaming flexibility, the authors propose integrating mobile IP with Manets to realize the dream of broadband wireless Internet access.
Learning construction-planning knowledge from experience
(1997)
Dzeng, RJ
;
Chen, WT
;
土木工程學系
;
Department of Civil Engineering
The evolution of a construction product throughout ifs engineering life cycle requires many experts in different fields. A training process for a novice to become an expert requires tremendous cost and time. When an expert leaves or retires, knowledge that is accumulated through years of experience is also gone, or stored as various documents that are unorganized and hard to find. Human planners are one type of experts that require such a learning process, which is slow and inefficient. This paper uses construction-planning knowledge as an example to describe an knowledge acquisition system that extracts planning knowledge through generalization of existing construction schedules with human annotation.
MR-FQ: A fair scheduling algorithm for wireless networks with variable transmission rates
(2005-01-01)
Wang, YC
;
Tseng, YC
;
Chen, WT
;
Tsai, KC
;
資訊工程學系
Wireless networks are characterized by bursty and location-dependent errors. Although many fair scheduling methods have been proposed to address these issues, most of them assume a simple two-state channel model, where a channel can be either good or bad. However, the situation is not so pessimistic since different modulation techniques can be adapted to different channel conditions. Multi-rate transmission is a common technique for wireless networks nowadays. This leads to a dilemma: should fairness be built based on the amount of medium time that a user utilizes or the amount of services that a user receives? In this work, we propose a Multi-rate wireless Fair Queueing (MR-FQ) algorithm that allows a flow to transmit at different rates according to its channel condition and lagging degree. MR-FQ takes both time and service fairness into account. It not only guarantees fairness and bounded delays for packet flows, but also increases the overall system throughput.
MR-FQ: A fair scheduling algorithm for wireless networks with variable transmission rates
(2005-08-01)
Wang, YC
;
Tseng, YC
;
Chen, WT
;
資訊工程學系
;
Department of Computer Science
Wireless networks are characterized by bursty and location-dependent errors. Although many fair scheduling algorithms have been proposed to address these issues, most of them assume a simple two-state channel model, where a channel can be either good or bad. In fact, the situation is not so pessimistic because different modulation techniques can be used to adapt to different channel conditions. Multirate transmission is a common technique forwireless networks nowadays. This leads to a dilemma: should fairness be built based on the amount of time that a user utilizes the medium or the amount of services that a user receives? In this work, the authors propose a multitate wireless fair queueing (MR-FQ) algorithm that allows a flow to transmit at different rates according to its channel condition and lagging degree. MR-FQ takes both time and service fairness into account. They demonstrate that MR-FQ can guarantee fairness and bounded delays for packet flows by mathematical modeling and analyses. Besides, simulation results show that MR-FQ can also increase the overall system throughput compared to other scheduling methods.
Power saving of a dynamic width controller for a monolithic current-mode CMOS DC-DC converter
(2005)
Lee, HC
;
Chang, KT
;
Chen, KH
;
Chen, WT
;
電控工程研究所
We propose the dynamic power MOS width controlling technique and the adaptive gate driver voltage technique to find out the better approach to power saving in DC-DC converters. It demonstrates that the dynamic power MOS width controlling technique has much improvement in power consumption than that of the adaptive gate driver voltage technique when the load current is heavy or light. After the dynamic power MOS width modification, the simulation results show that the efficiency of current-mode DC-DC buck converter can be improved from 92% to about 98% in heavy load and from 15% to about 16.3% in light load. However, the adaptive gate driver voltage technique has only little improvement of power saving. It means that the dynamic width controller is the better approach to power saving in the DC-DC converter.