Browsing by Author "Chen, Wei-Hsien"

Now showing 1 - 7 of 7

A 1.2V Interference-Sturdiness, DC-Offset Calibrated CMOS Receiver Utilizing a Current-Mode Filter for UWB
(2008)
Shih, Horng-Yuan
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Chen, Wei-Hsien
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Juang, Kai-Chenug
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Yang, Tzu-Yi
;
Kuo, Chien-Nan
An interference-sturdiness receiver with a current-mode filter for 3-5GHz UWB applications is implemented in a 1.2V 0.13 mu m CMOS process. The chip provides a maximum voltage gain of 70dB and a dynamic range of 60dB. The measured in-band OIP3 is +9.39dBm, out-of-band IIP3 -15dBm and noise figure 6.8dB in the maximum gain mode. An algorithm for the automatic digital DC offset calibration is also demonstrated.
A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain With Digital-Assisted DC-Offset Calibration for Ultra-Wideband
(2010-02-01)
Shih, Horng-Yuan
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Kuo, Chien-Nan
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Chen, Wei-Hsien
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Yang, Tzu-Yi
;
Juang, Kai-Chenug
A 250 MHz analog baseband chain for Ultra-Wideband was implemented in a 1.2 V 0.13 mu m CMOS process. The chip has an active area of 0.8 mm(2). In the analog baseband, PGAs and filters are carried out by current-mode amplifiers to achieve wide bandwidth and wide dynamic range of gain, as well as low noise and high linearity. Besides, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers. A 6th-order Chebyshev low-pass filter realized in G(m)-C topology is designed in the baseband chain for channel selection. Digitally-assisted DC-offset calibration improves second-order distortion of the entire chain. The design achieves a maximum gain of 73 dB and a dynamic range of 82 dB. Measured noise figure is 14 dB, an IIP3 of -6 dBV, and IIP2 of -5 dBV at the maximum gain mode. The analog baseband chain consumes 56.4 mA under supply of 1.2 V.
A charge accumulation-free voltage-controlled functional electrical stimulator with bi-phasic sinusoidal stimulation
(2019-11-01)
Chen, Wei-Hsien
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Chang, Chia-Hung
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Shih, Horng-Yuan
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Chiu, Tzai-Wen
;
Kuo, Chien-Nan
This paper presents a charge accumulation-free voltage-controlled (VC) bi-phasic sinusoidal functional electrical stimulator (FES) for bioelectronic application. Traditionally, constant current (CC) pulse-shaped FESs with active or passive charge balancers are used to compensate for accumulated charges arise from process, voltage and temperature (PVT) variation as a result of long-term stimulation. Unlike the CC pulse-shaped FES, the VC sinusoidal-shaped FES is adopted here to avoid charge accumulation over time. The charge balancer is not required, substantially reducing system complexity and the chip area of the FES. To demonstrate the feasibility of concept, in this paper, four channels of VC bi-phasic sinusoidal-shaped FESs are integrated with the bio-potential recording circuit to compare with four channels of CC bi-phasic pulse-shaped FESs that are integrated with the same neural recording system for comparison. Measurements indicate an absence of charge accumulation as a result of the VC FESs. In addition, here we adopt the sinusoidal stimulation to reduce transient effects on tissue in comparison to a pulse-shaped method. The bio-potential activities of a cockroach leg that is stimulated for 50 s by the proposed bi-phasic sinusoidal stimulation are recorded. The measured bio-potential activities of a cockroach leg show that no stimulation-evoked leg movement occurs under stimulation by the sinusoidal waveform.
A direct conversion transmitter with digital-assisted DC offset and I/Q phase calibration
(2017-12-01)
Chang, Chia-Hung
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Chen, Wei-Hsien
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Gong, Cihun-Siyong Alex
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Hu, Wei-Wen
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電機工程學系
A direct conversion transmitter with auto-calibration mechanism is presented in this paper. Both the carrier leakage and in-phase/quadrature (I/Q) phase imbalance are compensated by a proposed calibration algorithm to improve transmitter's single-sideband performance. The digital-assisted correction circuits are implemented in a calibration feedback path to reduce the mismatches and variations, which in turn achieves properties of high linearity, high sideband, and carrier suppression ratio. The measured single-sideband performance with calibration applied to the transmitter demonstrates an over 40 and 50-dBc rejection on sideband and carrier signals at the desired frequency band, respectively. For linearity performance, the measured output 1-dB compression point (OP1dB) is 9.1dBm, while the highest voltage gain is from 4.3 to 6.2dB. Additionally, the error vector magnitude (EVM) of -37.082dB (< 1.4%) can be achieved under an orthogonal frequency division multiple access (OFDMA) 64 QAM-3/4 modulated signal test. The transmitter consumes 112.7mA under supply voltage of 3.3V using the TSMC SiGe BiCMOS technology. Copyright (c) 2017 John Wiley & Sons, Ltd.
A Ultra-Low Power Channel Selection filter For Low-IF FSK Biomedical Receivers
(2012)
Shih, Horng-Yuan
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Chen, Wei-Hsien
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Juang, Kai-Chenug
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Chen, Chun-Fan
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Lin, Sheng-Kai
Ultra-low power (ULP) receivers can be applied in wearable and implantable biomedical sensors. In this paper, a ULP band-pass filter designed as a channel selection filter for low-IF FSK biomedical receivers is implemented in 1.8 V 0.18 mu m CMOS process. Under power consumption of 200 mu W, the measured central frequency and bandwidth is 1.5 MHz and 330 kHz, respectively. As applied in a low-IF FSK biomedical receiver, data rate of 330 kb/s can be achieved.
Non-contact Pulse-based Radar with an Excited RF Pulse Generator for Vital-sign Application
(2019-01-01)
Chen, Wei-Hsien
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Chang, Chia-Hung
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Kuo, Chien-Nan
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Hsu, Chia-Chin
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電子工程學系及電子研究所
This paper presents a pulse-based investigation to generate a serial of sensing pulses for probing the reciprocal movements of heartbeat and chest, respectively. An excited self-contained RF pulse generator with digital assisted controller is used for pulse shaping and performing nanosecond sensing pulses. In addition, the generator is implemented by a common source field-controlled transistor and a contour circuit by micro-strip line. Hence, in this paper, probing pulses and receives the echoes from the investigated subject back and forth by the whole sensing radar based on the monostatic antenna system. The demodulator is utilized to perform the multiplication of the reference probing waves and the return echoes delayed by the time interval between the emitted signal and reflected waves back to the radar module. The following analog baseband processing circuits with 3-stage topology for further amplifying and filtering the received physiological information help to increase the overall signal-to-noise ratio (SNR). The measured results demonstrate that the radiated RF pulses and vital signs are expected.
Vital-Sign Processing Receiver With Clutter Elimination Using Servo Feedback Loop for UWB Pulse Radar System
(2020-01-01)
Chang, Chia-Hung
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Chen, Wei-Hsien
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
This brief presents a vital-sign processing circuit for simultaneous dc/near-dc elimination and out-of-band interference rejection without any digital signal processing or algorithm assistance for the ultrawideband (UWB) pulse-based radar system. An intrinsic self-balanced MOS diode (SBMD) was proposed as a stable and balanced pseudo resistor applied under a servo feedback loop in a vital-sign receiver of the sensing radar to perform as a high-pass filter (HPF) with an ultralow corner frequency lower than 0.5 Hz for removing undesired clutters of the reflected signals and input dc-offset voltages from innate circuit offsets. A third-order switched-capacitor (SC) Chebyshev low-pass filter (LPF) with leap-frog topology as the subsequent stage was adopted to suppress the out-band noises, thereby establishing an integrated vital-sign processing circuit with bandpass frequency response and incorporating it into a radar module to verify its viability.