Browsing by Author "Chen, Wen-Chieh"

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Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction
(2019-06-01)
Chen, Wen-Chieh
;
Ker, Ming-Dou
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new on-chip transient detection circuit with superior area efficiency is proposed against the system malfunction resulting from system-level electrostatic discharge ( ESD) events. With dual-latched structure, a better area efficiency can be achieved by the reduced time constant inquiry. The proposed transient detection circuit with a silicon area of 40 mu m x 60 mu m has been fabricated in a 0.18-mu m CMOS process with 1.8-V devices. The detection sensitivity has been successfully verified under +/- 200 V system-level ESD tests. To achieve the "Class B" specification of IEC 61000-4-2 standard, the proposed transient detection circuit serves as a safety guard for the system. Through the hardware/firmware co-design, the auto-recovery procedure can be activated by the proposed transient detection circuit sending out a warning signal. With the proposed transient detection circuit co-works with the system program, the immunity level of microelectronic products against the electromagnetic compatibility (EMC) of ESD events can be effectively improved.
On-chip Transient Detection Circuit for Microelectronic Systems against Electrical Transient Disturbances due to ESD Events
(2018-01-01)
Chen, Wen-Chieh
;
Ker, Ming-Dou
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new on-chip transient detection circuit which can detect electrical disturbances of system-level electrostatic discharge (ESD) is proposed. The circuit is designed with reduced physical area by utilizing dual-latched structure. With hardware/firmware co-design method, auto-recovery procedure can be activated by the detection circuit when microelectronic systems suffer system-level ESD events. The immunity level of microelectronic products against the electromagnetic interference (EMI) of ESD events can be effectively improved. The proposed on-chip transient detection circuit has been verified in a 0.18-mu m CMOS process with 1.8-V devices under system-level ESD tests.
Surge protection design with surge-to-digital converter for microelectronic circuits and systems
(2018-09-01)
Chen, Wen-Chieh
;
Ker, Ming-Dou
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A surge protection design with surge-to-digital converter is proposed to provide the surge protection for microelectronic products with more flexible applications. The proposed surge-to-digital converter can transfer the occurrences of the surge events into digital output codes by classifying the voltage levels of surge events. It can be used to avoid unwanted power-on reset action, redundant power consumption, or unexpected soft errors, achieving the stability improvement of microelectronic systems. With this surge-to-digital converter, a surge protection design against a surge test of 25 V can clamp the peak voltage of V-DD from 22.2 V to 5.6 V. The proposed converter has been verified in a 0.18-mu m CMOS process.