Browsing by Author "Chen, YM"

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A sensitive Pirani vacuum sensor and the electrothermal SPICE modelling
(1996-05-01)
Chou, BCS
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Chen, YM
;
OuYang, M
;
Shie, JS
;
交大名義發表
A sensitive micro-Pirani vacuum sensor has been fabricated. With effective schemes of ambient-temperature compensation and stabilization, it is capable of measuring vacuum pressure linearly from 1 torr down to 10(-7) torr, a three orders-of-magnitude improvement in resolution over conventional gauges. A special electrothermal SPICE model, complementary to the conventional analog representation of thermal parameters, is also proposed. It allows a high-level sensor-circuit integrated simulation based on the most fundamental principle and thermal variables. Good agreement between the measured data obtained from a constant-temperature readout circuit and the simulation result is demonstrated.
All-optical 2R regeneration based on a compact self-seeded Fabry-Perot laser diode with an embedded fiber Bragg grating
(2006-01-01)
Chien, HC
;
Lee, CC
;
Chen, YM
;
Feng, KM
;
Chi, S
A cost-effective method, based on the injection-locking technique of a compact self-seeded Fabry-Perot laser diode with a 10-mm-long embedded fiber Bragg grating cavity, is proposed and experimentally compared with the two-mode injection-locked scheme for all-optical 2R regeneration at 10 Gb/s. Placing the presented all-optical 2R regenerator after a 50-km fiber significantly improves the transmission performance of a signal over 50- and 100-km fiber links. The power penalties at BER = 10(-9) are similar to those of the two-mode injection-locked scheme.
Analysis of optimal bolometer sensitivity with linear approximation
(1996)
Shie, JS
;
Chen, YM
;
Sheen, CS
;
光電工程學系
;
Department of Photonics
Characterization and modeling of metal-film microbolometer
(1996-12-01)
Shie, JS
;
Chen, YM
;
Mang, OY
;
Chou, BCS
;
光電工程研究所
The characteristic thermal parameters of a platinum-film microbolometer are extracted from the data of two measuring methods, A simple and accurate equivalent circuit model, along with its thermal behavior, is proposed for the device. Applying the model to simulate some device circuits results in good agreement with the experimental data, Furthermore, an effective method of ambient temperature compensation, proposed previously by our laboratory, is demonstrated both experimentally and by simulation using the same model. The established electro-thermal model therefore serves as an useful tool for SPICE simulations in the design of microbolometers.
Characterization and modeling of metal-film microbolometer
(1996-12-01)
Shie, JS
;
Chen, YM
;
Mang, OY
;
Chou, BCS
;
交大名義發表
The characteristic thermal parameters of a platinum-film microbolometer are extracted from the data of two measuring methods, A simple and accurate equivalent circuit model, along with its thermal behavior, is proposed for the device. Applying the model to simulate some device circuits results in good agreement with the experimental data, Furthermore, an effective method of ambient temperature compensation, proposed previously by our laboratory, is demonstrated both experimentally and by simulation using the same model. The established electro-thermal model therefore serves as an useful tool for SPICE simulations in the design of microbolometers.
CoSix thermal stability on narrow-width polysilicon resistors
(2006-01-01)
Chen, YM
;
Tu, GC
;
Wang, YL
;
Hwang, GJ
;
Lo, CY
In this study, the thermal stability of polysilicon lines with various widths and different dopant types in 90-nm processes is investigated. The thermal behavior of silicides formed on N+ polyresistors and P+ polyresistors is very different. The worst thermal stability is found on the narrower N+ polyresistors, while an abnormal thermal behavior is observed on P+ polyresistors. This anomalous thermal-stability change with different drawn linewidths of P+ polyresistors is related to the C Grain-size distribution and the actual polyresistor linewidth. Also, it is interesting to find that the voids formed in P+ polyresistors lead to a stepped increase in sheet resistance. (c) 2006 American Vactatin Society.
Effects of Ni thickness and reflow times on interfacial reactions between Ni/Cu under-bump metallization and eutectic Sn-Pb solder in flip-chip technology
(2003-02-01)
Huang, CS
;
Duh, JG
;
Chen, YM
;
Wang, JH
;
材料科學與工程學系
Flip-chip interconnection technology plays a key role in today's electronics packaging. Understanding the interfacial reactions between the solder and under-bump metallization (UBM) is, thus, essential. In this study, different thicknesses of electroplated Ni were used to evaluate the phase transformation between Ni/Cu under-bump metallurgy and eutectic Sn-Pb solder in the 63Sn-37Pb/Ni/Cu/Ti/Si3N4/Si multilayer structure for the flip-chip technology. Interfacial reaction products varied with reflow times. After the first reflow, layered (Ni1-x,Cu-x)(3)Sn-4 was found between solder and Ni. However, there were two interfacial reaction products formed between solders and the UBM after three or more times reflow. The layered (Ni1-xCux)(3)Sn-4 was next to the Ni/Cu UBM. The islandlike (Cu1-y,Ni-y)(6)Sn-5 was formed between (Ni,Cu)(3)Sn-4 and solders. The amounts of (Cu1-y,Ni-y)(6)Sn-5 intermetallic compound (IMC) could be related to the Ni thickness and reflow times. In addition, the influence of Cu contents on phase transformation during reflow was also studied.
Feasibility study on a contact-less direct thermal printing with electrothermal SPICE simulation
(2001-02-15)
Chen, YM
;
Shie, JS
;
光電工程學系
;
Department of Photonics
A new concept for making contact-less direct thermal printing for facsimile is proposed and evaluated in this article. The concept is based on the fact that air molecules can be a good thermal conduction medium capable of transferring the heat efficiently from a micro-heater to a thermal marking paper, if both in close proximity, The micro-heater can be made of single-crystal silicon by micromachining technology, hence the associated CMOS driving circuits can be fabricated monolithically with the heater to exempt from the tedious work of numerous wire bonding. An illustrative device of integrated micro-heater array in 200 dpi resolution has been fabricated, characterized and evaluated for the new printing application. A thermal model of the device has also been set up and studied of its dynamic behaviors using the existing electrothermal SPICE package. The result of simulations indicates that efficient energy transfer of more than 40%, much better than the conventional performance, can be achieved with a practical 1 mum air gap. This and other additional advantages described in the article indicates that, in principle, the contact-less direct thermal printing is feasible and the monolithic silicon micro-heater array can be an excellent device for this application. (C) 2001 Elsevier Science B.V. All rights reserved.
Improvement of polysilicon oxide integrity using NF3-annealing
(2000-06-15)
Yang, WL
;
Shieh, MS
;
Chen, YM
;
Chao, TS
;
Liu, DG
We report a method to improve the polysilicon oxide integrity by using NF3-annealing. Incorporating with stronger Si-N and Si-F bonds at the polysilicon/polyoxide interface, significant improvements are found in terms of roughness, breakdown strength, charge-to-breakdown, and stress-induced-leakage-current.
Metallurgical reaction of the Sn-3.5Ag solder and Sn-37Pb solder with Ni/Cu under-bump metallization in a flip-chip package
(2003-12-01)
Huang, CS
;
Duh, JG
;
Chen, YM
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Several international legislations recently banned the use of Pb because of environmental concerns. The eutectic Sn-Ag solder is one of the promising candidates to replace the conventional Sn-Pb solder primarily because of its excellent mechanical properties. In this study, interfacial reaction of the eutectic Sn-Ag and Sn-Pb solders with Ni/Cu under-bump metallization (UBM) was investigated with a joint assembly of solder/Ni/Cu/Ti/Si(3)N(4)/Si multilayer structures. After reflows, only one (Ni,Cu)(3)Sn(4) intermetallic compound (IMC) with faceted and particlelike grain feature was found between the solder and Ni. The thickness and grain size of the IMC increased with reflow times. Another (Cu,Ni)(6)Sn(5) IMC with a rod-type grain formed on (Ni,Cu)(3)Sn(4) in the interface between the Sn-Pb solder and the Ni/Cu UBM after more than three reflow times. The thickness of the (Ni,Cu)(3)Sn(4) layer formed in the Sn-Pb system remained almost identical despite the numbers of reflow; however, the amounts of (Cu,Ni)(6)Sn(5) IMC increased with reflow times. Correlations between the IMC morphologies, Cu diffusion behavior, and IMC transformation in these two solder systems will be investigated with respect to the microstructural evolution between the solders and the Ni/Cu UBM. The morphologies and grain-size distributions of the (Ni,Cu)(3)Sn(4) IMC formed in the initial stage of reflow are crucial for the subsequent phase transformation of the other IMC.
Oxide-mediated fort-nation of epitaxy silicide on heavily doped Si surfaces and narrow width active region
(2006-03-01)
Chen, YM
;
Tu, GC
;
Wang, YL
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Oxide-mediated epitaxy (OME) is a highly promising means of forming epitaxial CoSi2. In this work, various chemical treatments were applied to grow chemical oxides on heavily doped Si substrates and narrow width active region. The effects of the treatment on the OME performance were investigated. Both the thickness and the quality of the oxide varied with the chemicals and dopants, resulting in various levels of junction leakage current. The junction leakage current was minimized by choosing the most favorable chemical treatment and optimizing the annealing temperature. (c) 2005 Elsevier B.V. All rights reserved.
Parameter extraction of resistive thermal sensors
(1996-07-15)
Chen, YM
;
Shie, JS
;
Hwang, T
;
交大名義發表
;
光電工程學系
Obtaining thermal parameters is important in evaluating the performance of thermal microsensors. Two experimental methods are described here for the study of the pressure-dependent thermal behavior of the sensors: a bolometric method that utilizes a chopped light input to obtain a sensor frequency response, and deriving its thermal data therefrom; a d.c, electrical method that measures the heat required for balance under d.c. bias, and obtaining sensor information. The thermal conductance and capacitance, absorptance, as well as emissivity of a sensor can be extracted from the experimental measurements. These parameters provide the essential data for the electrothermal SPICE program in the related design simulations.
Reverse CoSi(2) thermal stability and digitized sheet resistance increase of sub-90 nm polysilicon lines
(2005-04-01)
Lo, CY
;
Peng, YC
;
Chen, YM
;
Tu, GC
;
Lin, SS
An equation for quantifying the CoSi(2) thermal stability of polysilicon lines ranging from 50 nm to 2 mu m is proposed for the first time. In contrast to the intuitive thinking of narrower lines having a worse thermal stability, the equation predicts the weakest thermal stability occurring at the super nominal line in 90nm technology. An interesting phenomenon of digitized resistance increase is also reported for the first time.
Width-dependent anomalous CoSix sheet resistance change by Ti and TiN capping process
(2006-03-01)
Chen, YM
;
Tu, GC
;
Wang, YL
;
材料科學與工程學系
;
Department of Materials Science and Engineering
In order to minimize the circuit propagation delay, self-aligned silicide (salicide) technology has been widely used to reduce source/drain/gate spreading resistance and contact resistance. Cobalt silicide (CoSi2) is the most popular silicide material beyond 0.25 mu m node as it has less line width dependence than titanium silicide (TiSi2). Cobalt on silicon with TiN capping or Ti capping has been widely applied for years and demonstrates a very promising manufacturability and scalability toward 0.1 mu m and below. In this work, width-dependent sheet resistance change was studied and the anomalous sheet resistance behavior was observed to be very different for these two different capping materials. The different silicide profiles around active regions and shallow trench isolation (STI) interface were identified to be the root cause for this difference. The stress built at STI and active regions played an important role for silicide formation. Experimental results can conclude that capping material selection is very crucial for deep submicron ultralarge silicon integrated (ULSI) circuit. (c) 2005 Elsevier B.V. All rights reserved.