Browsing by Author "Chen, Yi-Chan"

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Degradation of Low Temperature Polycrystalline Silicon Thin Film Transistors under Negative Bias Temperature Instability Stress with Illumination Effect
(2010)
Lin, Chia-Sheng
;
Chen, Ying-Chung
;
Chang, Ting-Chang
;
Li, Hung-Wei
;
Hsu, Wei-Che
This work investigates negative bias temperature instability (NBTI) in low temperature polycrystalline silicon thin film transistors (LTPS TFTs) in a darkened and in an illuminated environment of different light intensities. Experimental results reveal that the generations of interface state density (N(it)) are identical under various illuminated intensity NBTI stresses. Nevertheless, the degradation of the grain boundary trap (N(trap)) under illumination was more significant than that for the darkened environment, with degradation increasing as illumination intensity increases. This phenomenon is mainly caused by the extra number of holes generated during the illuminated NBTI stress. The increased N(trap) degradation leads to an increase in the darkened environment leakage current. This indicates that more traps are generated in the drain junction region than from carrier tunneling via the trap, resulting in leakage current. Conversely, an increase in N(trap) degradation results in a decrease in the photoleakage current. This indicates that the number of recombination centers increases in the poly-Si bulk, affecting photosensitivity in LTPS TFTs.
Temperature-dependent memory characteristics of silicon-oxide-nitride-oxide-silicon thin-film-transistors
(2010-05-03)
Chen, Shih-Ching
;
Chang, Ting-Chang
;
Wu, Yung-Chun
;
Chin, Jing-Yi
;
Syu, Yong-En
This study investigates the temperature-dependent memory characteristics of polycrystalline silicon thin-film transistors with oxide/nitride/oxide stack gate dielectrics and N(+) poly-Si gate structures for nonvolatile memory application. As the device was programmed by Fowler-Nordheim tunneling at high temperature, some electrons captured in shallow traps could obtain enough thermal energy to de-trap to the gate, resulting in low programming efficiency. As the programming time increases, the hole injection through the blocking oxide from the gate would further lead the threshold voltage to decrease. In addition, the retention characteristic of the device programmed at higher temperature exhibits better charge storage ability. Because the electrons trapped in the shallow traps of the nitride layer can be easily de-trapped when temperature rises, the memory characteristics are mainly dominated by charges stored in the deep traps. (C) 2009 Elsevier B.V. All rights reserved.