Browsing by Author "Cheng, Hui-Wen"

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3D Device Simulation of Work Function and Interface Trap Fluctuations on High-kappa/Metal Gate Devices
(2010)
Cheng, Hui-Wen
;
Li, Fu-Hai
;
Han, Ming-Hung
;
Yiu, Chun-Yen
;
Yu, Chia-Hui
This work, for the first time, examines the work function fluctuation (WKF) and interface trap fluctuation (ITF) using experimentally calibrated 3D device simulation on high-kappa / metal gate technology. The random WKs result in 36.7 mV threshold voltage fluctuation (sigma V(th)) for 16 nm N-MOSFETs with TiN gate, which is rather different from the result of averaged WKF (AWKF) method [1] due to localized random WK effect. The ITF affects the subthreshold region (the normalized sigma I(D) > 48%) and is suppressed for devices under strong inversion. Estimation of statistical covariance confirms the dependence of IT on the metal gate's WK; thus, the impacts of WKF and ITF on device and circuit variability should be considered together properly. Such variability induced static noise margin fluctuation of SRAM exceeds the influence of random dopants and cannot be ignored.
A Unified 3D Device Simulation of Random Dopant, Interface Trap and Work Function Fluctuations on High-kappa/Metal Gate Device
(2011)
Li, Yiming
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Cheng, Hui-Wen
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Chiu, Yung-Yueh
;
Yiu, Chun-Yen
;
Su, Hsin-Wen
In this work, we for the first time estimate total fluctuation resulting from random dopants (RDs), interface trap (ITs) and work functions (WKs) using experimentally calibrated 3D device simulation on 16-nm-gate high-kappa/metal gate devices. The total 3D simulated threshold voltage fluctuation (sigma V-th), induced by the aforementioned random sources simultaneously, is 55.5 mV for NMOS; however, a statistical total sum of these fluctuations is 12.3% overestimation because independence assumption on random variables is invalid owing to strong interactions among RDs, ITs and WKs. Device's DC/AC and CMOS SRAM circuit fluctuations have similar observation. FinFET-based structure innovation possessing large fluctuation suppression (sigma V-th = 30.2 mV; 45.6% reduction), compared with process efforts on planar one, is further discussed.
A variable coefficient method for accurate Monte Carlo simulation of dynamic asset price
(2007)
Li, Yiming
;
Hung, Chih-Young
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Yu, Shao-Ming
;
Chiang, Su-Yun
;
Chiang, Yi-Hui
In this work, we propose an adaptive Monte Carlo (MC) simulation technique to compute the sample paths for the dynamical asset price. In contrast to conventional MC simulation with constant drift and volatility (mu,sigma) , our MC simulation is performed with variable coefficient methods for(mu,sigma)in the solution scheme, where the explored dynamic asset pricing model starts from the formulation of geometric Brownian motion. With the method of simultaneously updated (mu,sigma) , more than 5,000 runs of MC simulation are performed to fulfills basic accuracy of the large-scale computation and suppresses statistical variance. Daily changes of stock market index in Taiwan and Japan are investigated and analyzed.
Characteristic fluctuation dependence on discrete dopant for 16nm SOI FinFETs at different temperature
(2007)
Li, Yiming
;
Hwang, Chih-Hong
;
Yu, Shao-Ming
;
Huang, Hsuan-Ming
;
Yeh, Ta-Ching
In this paper, we numerically study the discrete-dopant-induced characteristic fluctuations in 16nnn silicon-on-insulator (SOI) FinFETs. For devices under different temperature condition, discrete dopants are statistically generated and positioned into the three-dimensional channel region to examine associated carrier transportation characteristics, concurrently capturing "dopant concentration variation" and "dopant position fluctuation". Electrical characteristics' fluctuations are growing worse when the substrate temperature increases, the standard deviation of threshold voltage increases 1.75 times when substrate temperature increases from 300K to 400K for example. This "atomistic" device simulation technique is computationally cost-effective and provides us an insight into the problem of discrete-dopant-induced fluctuation and the relation between the fluctuation and thermal effect.
Comparative Study of Multigate and Multifin Metal-Oxide-Semiconductor Field-Effect Transistor
(2010)
Cheng, Hui-Wen
;
Li, Yiming
;
傳播研究所
;
電機工程學系
;
Institute of Communication Studies
In this work, we explore the effects of the number of fins and fin structure on the device DC, dynamic behaviors, and random-dopant-induced characteristic fluctuations of multifin field-effect transistor (FET) circuits. Multifin FETs with different fin aspect ratios [AR = fin height (H(fin))/fin width (W(fin))] and a fixed channel volume are simulated in a three-dimensional device simulation and the simulation results are experimentally validated. The multi-fin FinFET (AR = 2) has better channel controllability than the multifin trigate (AR = 1) and multi-fin quasi-planar (AR = 0.5) FETs. A six-transistor (6T) static random access memory (SRAM) using multi-fin FinFETs also provides the largest static noise margin because it supports the highest transconductance in FinFETs. Although FinFETs have a large effective device width and driving current, their large gate capacitance limits gate delay. The transient characteristics of an inverter with multi-fin transistors are further examined, and compared with those of an inverter with single-fin transistors. The multi-fin inverter has a shorter delay because it is dominated by the driving current of the transistor. With respect to random-dopant-induced fluctuations, the multifin FinFET suppresses not only the surface potential but also its variation because it has a more uniform surface potential than the multifin trigate and quasi-planar FET, and so the effects of random dopants on the circuits are attenuated. The results of this study provide insight into the DC, and circuit characteristics of multifin transistors and associated random dopant fluctuations. (C) 2010 The Japan Society of Applied Physics
Comprehensive Examination of Threshold Voltage Fluctuations in Nanoscale Planar MOSFET and Bulk FinFET Devices
(2008)
Hwang, Chih-Hong
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Cheng, Hui-Wen
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Yeh, Ta-Ching
;
Li, Tien-Yeh
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Huang, Hsuan-Ming
Intrinsic fluctuations on device characteristics, such as the threshold voltage (V(th)) fluctuation is crucial in determining the behavior of nanoscale semiconductor devices. In this paper, the dependency of process-variation and random-dopant-induced Vth fluctuation on the gate oxide thickness scaling in 16 nm metal-oxide-semiconductor field effect transistors (MOSFETs) is investigated. Fluctuations of the threshold voltage for the studied planar MOSFETs with equivalent oxide thicknesses (EOT) from 1.2 nm to 0.2 nm (e.g., SiO(2) for the 1.2 and 0.8 nm EOTs, Al(2)O(3) for the 0.4 nm EOT and HfO(2) for the 0.2 nm EOT) are then for the first time compared with the results of 16nm bulk fin-typed filed effect transistors (FinFETs), which is one of the promising candidates for next generation semiconductor devices. An experimentally validated simulation is conducted to investigate the fluctuation property. Result of this study confirms the suppression of Vth fluctuations with the gate oxide thickness scaling (using high-kappa dielectric). It's found that the immunity of the planar MOSFET against fluctuation suffers from nature of structural limitations. Bulk FinFETs alleviate the challenges of device's scaling and have potential in the nanoelectronics application.
Define high quality Type-I InGaAsSb/AlGaAsSb QW laser fabrication process with high-resolution x-ray diffraction
(2018-01-01)
Cheng, Hui-Wen
;
Lin, Chien-Hung
;
Lee, Chien-Ping
;
電機學院
;
電子工程學系及電子研究所
Active InGaAsSb/AlGaAsSb type-I quantum well (QW) compositions acceptable for pseudomorphic growth on GaSb substrates restrict the optical range to below 4 mu m. Increasing the In concentration in active region and growing lattice-matched barrier/cladding layers will reach higher emission wavelength. We need to overcome several issues during fabrication process to ensure this high quality epitaxial layer. In this paper, high-resolution x-ray diffraction (HRXRD) method is used to define optimal epitaxy parameters for stable type-I GaSb-based mid infrared laser structures.
Design of Miniaturized Antenna and Power Harvester Circuit on the Enucleated Porcine Eyes
(2014-01-01)
Cheng, Hui-Wen
;
Yu, Tsung-Chi
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Huang, Hong-Yi
;
Ting, Ssu-Han
;
Huang, Tzuen-Hsi
This letter describes a prototype of a miniaturized rectifying antenna (rectenna) design for the wireless powering of an ocular device. In contrast to the conventional on-lens loop antenna, this letter presents a loop antenna with stepped structures for optimal impedance to the rectifier. The return loss of the antenna less than -15 dB at 3 GHz is accomplished in a contact lens with a diameter ranging from 10 to 15 mm. Additionally, the radio frequency (RF) rectifier and voltage-boosting network (VBN) are optimized to enhance the power conversion efficiency (PCE) by using the voltage boosting technique. Experimental results indicate that the optimal rectifier, which is fabricated with the TSMC 0.18-mu m process, produces a dc output voltage of 2.94 V and a conversion efficiency of 31% across a resistive 3.5 k Omega load with an input power of +9 dBm. Moreover, the rectenna under the experiment with an enucleated porcine eye can be powered wirelessly with a transmitting device at a distance of 4 cm. The output power is 2.01 mW with a transmitting power of +32 dBm for the wireless ocular physiological monitoring (WOPM) system. Importantly, this letter demonstrates the feasibility of an optimal miniaturized on-lens rectenna design, capable of overcoming the RF power attenuation on the ocular tissue to increase the delivering distance and reduce the transmitting power.
Design of Miniaturized Antenna and Power Harvester Circuit on the Enucleated Porcine Eyes
(2014-01-01)
Cheng, Hui-Wen
;
Yu, Tsung-Chi
;
Huang, Hong-Yi
;
Ting, Ssu-Han
;
Huang, Tzuen-Hsi
This letter describes a prototype of a miniaturized rectifying antenna (rectenna) design for the wireless powering of an ocular device. In contrast to the conventional on-lens loop antenna, this letter presents a loop antenna with stepped structures for optimal impedance to the rectifier. The return loss of the antenna less than -15 dB at 3 GHz is accomplished in a contact lens with a diameter ranging from 10 to 15 mm. Additionally, the radio frequency (RF) rectifier and voltage-boosting network (VBN) are optimized to enhance the power conversion efficiency (PCE) by using the voltage boosting technique. Experimental results indicate that the optimal rectifier, which is fabricated with the TSMC 0.18-mu m process, produces a dc output voltage of 2.94 V and a conversion efficiency of 31% across a resistive 3.5 k Omega load with an input power of +9 dBm. Moreover, the rectenna under the experiment with an enucleated porcine eye can be powered wirelessly with a transmitting device at a distance of 4 cm. The output power is 2.01 mW with a transmitting power of +32 dBm for the wireless ocular physiological monitoring (WOPM) system. Importantly, this letter demonstrates the feasibility of an optimal miniaturized on-lens rectenna design, capable of overcoming the RF power attenuation on the ocular tissue to increase the delivering distance and reduce the transmitting power.
Device Simulation-Based Multiobjective Evolutionary Algorithm for Process Optimization of Semiconductor Solar Cells
(2013-07-03)
Li, Yiming
;
Chen, Yu-Yu
;
Chen, Chieh-Yang
;
Shen, Cheng-Han
;
Cheng, Hui-Wen
This article implements for the first time a numerical semiconductor device simulation-based multiobjective evolutionary algorithm (MOEA) for the characteristic optimization of amorphous silicon thin-film solar cells, based upon a unified optimization framework (UOF). To calculate the device's characteristic, a set of coupled solar cell transport equations consisting of the Poisson equation, the electron-hole current continuity equations, and the photo-generation model is solved numerically. Electrical characteristics, the short-circuited current, the open-circuited voltage, and the conversion efficiency are calculated to analyze the properties of the explored solar cells. The aforementioned device simulation results are used to evaluate the fitness score and access the evolutionary quality of designing parameters via the implemented non-dominating sorting genetic algorithm (NSGA-II) in the UOF. Notably, designing parameters including the material and structural parameters, and the doping concentrations are simultaneously optimized for the explored solar cells. The simulation-based MOEA methodology is useful in optimal structure design and manufacturing of semiconductor solar cells.
Discrete-Dopant-Fluctuated Transient Behavior and Variability Suppression in 16-nm-Gate Complementary Metal-Oxide-Semiconductor Field-Effect Transistors
(2009-04-01)
Li, Yiming
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Hwang, Chih-Hong
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Cheng, Hui-Wen
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電信工程研究所
;
Institute of Communications Engineering
Variability in the characteristics of nanoscale complementary metal-oxide-semiconductor (CMOS) field-effect transistors is a major challenge to scaling and integration. However, little attention has been focused on the existence of transient behavior fluctuations of devices owing to random dopant placement. In this study, we explore the discrete-dopant-induced transient behavior fluctuations of 16-nm-gate CMOS circuits through a three-dimensional large-scale statistically sound "atomistic" device-circuit-coupled simulation approach, concurrently capturing "dopant concentration variation" and "dopant position fluctuation". For a 16-nm-gate CMOS inverter, a 3.5% variation of the rise time, a 2.4% variation of the fall time, an 18.3% variation of the high-to-low delay time, and a 13.2% variation of the low-to-high delay time are estimated and discussed. Fluctuation suppression techniques proposed from the device and the circuit viewpoints are implemented to examine the associated intrinsic fluctuations. (C) 2009 The Japan Society of Applied Physics
Effect of Etching Depth on Threshold Characteristics of GaSb-Based Middle Infrared Photonic-Crystal Surface-Emitting Lasers
(2019-03-14)
Li, Zong-Lin
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Lin, Shen-Chieh
;
Lin, Gray
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Cheng, Hui-Wen
;
Sun, Kien-Wen
We study the effect of etching depth on the threshold characteristics of GaSb-based middle infrared (Mid-IR) photonic-crystal surface-emitting lasers (PCSELs) with different lattice periods. The below-threshold emission spectra are measured to identify the bandgap as well as band-edge modes. Moreover, the bandgap separation widens with increasing etching depth as a result of enhanced diffraction feedback coupling. However, the coupling is nearly independent of lattice period. The relationship between threshold gain and Bragg detuning is also experimentally determined for PCSELs and is similar to that calculated theoretically for one-dimensional distributed feedback lasers.
Effect of Flash Lamp Annealing and Laser Spike Annealing on Random Dopant Fluctuation of 15-nm Metal-Oxide-Semiconductor Devices
(2012-03-01)
Cheng, Hui-Wen
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Hwang, Chih-Hong
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Chao, Ko-An
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Li, Yiming
;
材料科學與工程學系
Comparison of two different implantation processing techniques for random dopant (RD)-induced threshold voltage fluctuation (sigma V-th) in 15-nm metal-oxide-semiconductor (MOS) devices is reported. Implantations of flash lamp annealing and laser spike annealing are simulated using a kinetic Monte Carlo (KMC) technique. The KMC generated distributions are mapped into device channel for three-dimensional quantum mechanical transport simulation to estimate threshold voltage fluctuation. The main results of this study show that the laser spike annealing could achieve 30% reduction of RDF-induced sigma V-th for low-power application of 15-nm MOS devices, compared with flash lamp annealing.
Effect of Process Variation on 15-nm-Gate Stacked Multichannel Surrounding-Gate Field Effect Transistor
(2009)
Han, Ming-Hung
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Cheng, Hui-Wen
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Hwang, Chih-Hong
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Li, Yiming
;
傳播研究所
Stacked multichannel transistor architectures were proposed recently which possess very attractive electrical characteristics on low leakage current and high driving current per layout area. However, due to complex manufacturing process, the process variation effect is inevitable and whose impact is unknown. Therefore, this study investigates the impact of process variation on 15-nm-gate stacked multichannel transistors consisting of the gate length deviation, channel position variation, quadruple-shaped channel structure and elliptic gate oxide. Our preliminary result shows that the stacked multichannel devices have good immunity to the gate length deviation and channel spacing variations; however, they are sensitive to the gate coverage ratio and gate oxide thickness variations. This study provides an insight into the device characteristic variations, which may benefit the development of nanoscale stacked multichannel transistors and circuits.
Effects of Random Work Function Fluctuations in Nanoszied Metal Grains on Electrical Characteristic of 16 nm High-kappa/Metal Gate Bulk FinFETs
(2011)
Cheng, Hui-Wen
;
Chiu, Yung-Yueh
;
Li, Yiming
;
電機學院
;
電子工程學系及電子研究所
In this work, the work function fluctuation (WKF) induced variability in 16-nm-gate planar MOSFET and bulk FinFET is for the first time explored and compared. Based upon an experimentally calibrated 3D device simulation, the newly developed localized WKF (LWKF) simulation technique enables us to estimate the threshold voltage and DC baseband fluctuations of devices which accounts for the random grain\'s number and position effects simultaneously. The results show that the random work function, resulting from local nanosized metal grains in bulk FinFET, induced relatively small threshold voltage (V-th) fluctuation (about 2.5 times lower), compared with the result of planar device.
Electrical characteristics dependence on the channel fin aspect ratio of multi-fin field effect transistors
(2009-11-02)
Cheng, Hui-Wen
;
Li, Yiming
;
傳播研究所
;
電子工程學系及電子研究所
;
Institute of Communication Studies
In this work we investigate the impact of the fin number and structure on device dc and dynamic behaviors of multi-fin field effect transistor (FET) circuits. Based on the same channel volume, multi-fin FETs with different fin aspect ratio (AR equivalent to fin height/fin width) are explored using an experimentally validated three-dimensional device simulation. The multi-fin FinFET (AR = 2) has a better channel controllability than the tri-gate (AR = 1) and the quasi-planar (AR = 0.5) FETs. Besides, the 6T SRAM with triple-fin FinFETs provides the largest static noise margin because of the largest transconductance. Notably, though the FinFETs are with a large effective fin width and driving current, the larger gate capacitance may limit the intrinsic device gate delay. The transient characteristics of multi-fin inverters are further examined with different load capacitance (C(load)). As C(load) is increased, the impact of the device intrinsic gate capacitance on transient characteristcs is decreased and the delay time compared with that of single-fin inverters is smaller due to being dominated by the driving current of the transistor. Consequently, the multi-fin FinFET circuits exhibit a smallest delay time. The results of the study provide an insight into the dc and transient characteristics of multi-fin transistors and associated digital circuits.
Electrical Characteristics of Nanoscale Multi-Fin Field Effect Transistors with Different Fin Aspect Ratio
(2009)
Cheng, Hui-Wen
;
Hwang, Chih-Hong
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Li, Yiming
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電信工程研究所
;
Institute of Communications Engineering
Device characteristics of multiple-fin silicon field effect transistors (FETs) arc sensitive to the channel fin aspect ratio (AR = the fin height / the fin width). In this study, dependence of characteristics on AR for single- and multi-fin FETs arc examined by using a three-dimensional device simulation. The threshold voltage (V(th)) variation of triplefin FET is smaller than that of singlc-fin one clue to a relatively larger effective device width. The triple-fin device with FinFET structure (AR = 2) exhibit rather stable V(th) roll-off characteristics owing to more uniform potential distribution inside the channel. The results of our study show that the driving current, transconductance, gate capacitance of FinFETs are superior to that of tri-gate (AR = 1) and quasi-planar (AR = 0.5) FETs. From the, layout viewpoint, FinFETs has the best layout area efficiency; consequently, to design a device with the subthreshold swing < 70 mV/dec, the layout area of FinFETs is L67 and 1.33 times smaller than those of quasi-planar and tri-gate FETs.
Emission Efficiency Dependence on the Tilted Angle of Nanogaps in Surface Conduction Electron-Emitter
(2008)
Li, Yiming
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Kuo, Yi-Ting
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Cheng, Hui-Wen
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Yeh, Ta-Ching
;
Lo, Hsiang-Yu
In this work, the emission efficiency of the novel surface conduction electron-emitter corresponding to tilted angles (0) of the driving electrode is studied numerically. Due to the small angle, the emitter apex becomes significant and induces large electric field. The large electric field then attracts more particles into vacuum and then increases the emission current. However, the structure of the driving electrode limits the electron trajectory while the angle decreases, and it reflects the portion of collected current by the anode decreases and makes a drop in emission efficiency. It shows there is the highest emission efficiency (about 37%) under an optimum angle theta = 60 degrees. The result provides an insight into the relation between emission efficiency and emitter apex.
Enhancement of Field Emission on Surface Conduction Electron-Emitters
(2009)
Cheng, Hui-Wen
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Li, Yiming
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電信工程研究所
;
Institute of Communications Engineering
In this work, a novel nanogap with inclined protrusion cathode in palladium strip fabricated by hydrogen absorption under high pressure treatment is optimized for the surface conduction electron emitter. The results of our previous study had shown that the field emission property of the tested structure is superior to conventional one with a coplanar cathode. For a specified emitter material, the surface conduction electron-emitters (SCE) are further investigated by varying the thickness, tilted angle and gap of palladium (Pd). An optimal field emission efficiency with 80 tilted angle, 120 nm gap and 10 nm thickness of Pd is found for certain designed field emission efficiency. We further find that varying the emitter material work function of the emitter material from 5.12 eV to 3.9 eV will further improve the field emission property due to the increase of the emitted current.
Field emission property of carbon nanotube field emitters in triode structure fabricated with anodic aluminum oxide templates
(2008-04-01)
Li, Yiming
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Cheng, Hui-Wen
;
Lin, Chen-Chun
;
Pan, Fu-Ming
;
材料科學與工程學系
In this work, we study the field emission (FE) properties of carbon nanotubes (CNTs) field emitters in the triode structure fabricated with anodic aluminum oxide (AAO) template. To obtain the self-consistent solution, a set of Maxwell's equations coupling with Lorentz equation are solved simultaneously using finite difference time domain (FDTD) particle-in-cell (PIC) method. The FE current is then computed with the Fowler-Nordheim equation. To validate our simulation model, we firstly calibrate the collected electron current density between the measurement data of fabricated AAO-CNTs and simulation result. We find that the high density of CNTs will result in large screening effect among adjacent emitters and reduce the strength of electric field. Consequently, it significantly affects the collected emission current density. Our prediction shows that more than three-order magnitude difference on the collected emission current density could be observed when the spacing between CNTs is decreased from 0.7 to 0.233 mu m for the explored structure with the diameter of 7 mu m. Effects of random heights and thickness of oxide on the FE property of structure are also discussed.