Browsing by Author "Cheng, LJ"

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A novel device structure for low-temperature polysilicon TFTs with controlled grain growth in channel regions
(2000)
Cheng, LJ
;
Lu, YL
;
Lin, CW
;
Chang, TK
;
Cheng, HC
In this paper, we demonstrate a novel device structure of low-temperature polysilicon thin-film transistors (LTPS TFTs) for AMLCD applications with using excimer-laser crystallization (ELC). The device structure consists of a thin channel and a thick source/drain. This structure has its merit in the process of ELC and is capable of improving TFTs' electrical characteristics. During excimer laser irradiation, this kind of recessed structure is able to build up localized lateral thermal gradients in the regions near the steps and entice crystallization from the chiller thick source/drain regions toward the hotter thin channels. Because of the development of crystallization process, the average field-effect mobility of the devices can be increased to about 350 cm(2)/V.s, and the on/off current ratios exceed eight orders. In addition to improvement of device performance, the process window of ELC is broadened with the recessed structure.
Degradation of passivated and non-passivated N-channel low-temperature polycrystalline silicon TFTs prepared by excimer laser processing
(2002-08-01)
Teng, TH
;
Huang, CY
;
Chang, TK
;
Lin, CW
;
Cheng, LJ
The instability mechanisms of passivated and non-passivated low-temperature polycrystalline silicon thin film transistors (LTPS TFTs) under various bias stress conditions have been investigated. Irrespective of plasma treatment, the degradation was more severe under negative gate bias stress than that under positive gate bias stress. This could be due to Fowler-Nordheim tunneling electron induced impact ionization. For hot carrier stress, TFTs with NH3 plasma treatment degraded more severely than those without plasma treatment. This might be attributed to collapsing of weak Si-H bonds in NH3-plasma passivated devices. For the high current stress, it showed the opposite results against hot carrier stress. (C) 2002 Elsevier Science Ltd. All rights reserved.
Fabrication of low-temperature poly-Si thin film transistors with self-aligned graded lightly doped drain structure
(2002-01-01)
Cheng, HC
;
Lin, CW
;
Cheng, LJ
;
Tseng, CH
;
Chang, TK
A novel approach for fabricating low-temperature poly-Si (LTPS) thin film transistors (TFTs) with self-aligned graded lightly doped drain (LDD) structure was demonstrated. The self-aligned graded LDD structure was formed by side-etching the Al gate under the photoresist followed by excimer laser irradiation for dopant activation and lateral diffusion. The graded LDD poly-Si TFTs exhibited low-leakage-current characteristics without significantly sacrificing driving capability due to the graded dopant distribution in the LDD regions, in which the drain electric field could be reduced. The leakage current of 1 mum graded LDD UPS TFTs at Vds = 5 V and Vgs = -10 V could reach below 1 pA/mum, and the on/off current ratio at Vds = 5 V exceeded 10(7). (C) 2001 The Electrochemical Society.
High-performance low-temperature poly-Si TFTs crystallized by excimer laser irradiation with recessed-channel structure
(2001-06-01)
Lin, CW
;
Cheng, LJ
;
Lu, YL
;
Lee, YS
;
Cheng, HC
High-performance low-temperature poly-Si (LTPS) thin-film transistors (TFTs) have been fabricated by excimer laser crystallization (ELC) with recessed-channel (RC) structure, The TFTs made by this method possessed large longitudinal grains in the channel regions, therefore, they exhibited better electrical char acteristics as compared with the conventional ones. The average field-effect mobility above 300 cm(2)/V-s and on/off current ratio higher than 10(9) were achieved in these RC-structure devices, In addition, since grain growth could be artificially controlled by this method, the device electrical characteristics were less sensitive to laser energy density variation, and therefore the uniformity of device performance could be improved.