Browsing by Author "Cheng, O"

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Low leakage reliability characterization methodology for advanced CMOS with gate oxide in the 1nm range
(2004)
Chung, SS
;
Feng, HJ
;
Hsieh, YS
;
Liu, A
;
Lin, WM
A low leakage characterization technique for the lateral profiling of interface and oxide traps in a 12Angstrom-16Angstrom range gate oxide CMOS devices has been demonstrated. The approach being taken includes an incremental frequency Charge-Pumping(IFCP) measurement and a neutralization procedure such that interface and oxide traps can be separated. The most critical steps are the elimination of leakage current during measurement and a neutralization procedure, which enables accurate detennination of interface and oxide traps. This method has been demonstrated successfully for an advanced sub-100nm CMOS devices. As an important merit for its application, evaluations of HC reliability and NBTI effect have also been demonstrated. Evaluations of gate oxide qualities with plasma nitridation in both n- and p-MOSFET reliabilities have been properly described based on the current analysis technique.
Temperature effects of n-MOSFET devices with uniaxial mechanical strains
(2006)
Tsai, MN
;
Chang, TC
;
Liu, PT
;
Cheng, O
;
Huang, CT
This work presents a means of causing mechanical uniaxial stress in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs). The proposed method provided a valuable reference for research into both strained-Si and the temperature effect. In this article, tensile stress is applied parallel or perpendicular to the channel direction at room and high temperature. The shift in the energy levels of strained silicon depends on the direction of uniaxial strain, and changes the average in-plane transport mass. (c) 2006 The Electrochemical Society.