Browsing by Author "Cheng, Shi-You"

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Low-power instruction cache architecture using pre-tag checking
(2007)
Cheng, Shi-You
;
Huang, Juinn-Dar
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, we propose a low-power instruction cache architecture utilizing three techniques two-phased cache, sequential access indicator for tag-memory access skipping, and a new proposed technique named pre-tag checking. By these techniques, significant portion of tag-memory and data-memory accesses can be eliminated to reduce the power consumption. The experimental results show that the proposed instruction cache architecture can reduce about 54% power consumption compared to the conventional one for an 8KB two-way set associative cache.