Browsing by Author "Cheng Yu-Ting"

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CATALYTIC SEEDING CONTROL METHOD
(2011-06-09)
Chen C.C.
;
Cheng Yu-Ting
;
Hsu Lun-Hao
;
Rern Kai
A catalytic seeding control method is disclosed. A catalytic metal film is deposited on a substrate with a nonwettable inclined surface. The catalytic metal film is then melted to form metal droplets. The metal droplets roll along the nonwettable inclined surface and aggregate to form a singular catalytic seed on the bottom of the nonwettable inclined surface. Then, the location of the singular catalytic seed is precisely controlled. Also, the size of the catalytic seed is controlled by adjusting the size of the inclined surface and the thickness of the catalytic metal layer to grow a one-dimensional structure with specific localization and single well-aligned manipulated size. The structure is utilized for the integrated microelectronic device fabrication.
Flexible micro-system and fabrication method thereof
(2013-07-09)
Chao Tzu-Yuan
;
Liang Chia-Wei
;
Cheng Yu-Ting
A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.
Method and Non-Transitory Computer Readable Medium Thereof for Thermal Analysis Modeling
(2012-12-20)
Chen Chien-Chang
;
Cheng Yu-Ting
A method and a non-transitory computer readable medium thereof for thermal analysis modeling are provided. The method includes establishing an electrothermal network π model on the basis of electronic modules of an electronic system to define a heat source, propagation paths and a common base of the electronic system. Observation points in the electronic system are defined, in which each observation point is located at an isothermal surface enclosing a volume surrounding a reference point, and where the reference point is the heat source or one observation point. A heat conduction temperature difference and a heat convection temperature difference are calculated according to a power density function, a thermal conductivity coefficient and a distance vector between the reference point and each observation point. A temperature distribution is established according to the heat conduction and the heat convection temperature difference and a defined temperature of the common base.
Method and non-transitory computer readable medium thereof for thermal analysis modeling
(2013-09-24)
Chen Chien-Chang
;
Cheng Yu-Ting
A method and a non-transitory computer readable medium thereof for thermal analysis modeling are provided. The method includes establishing an electrothermal network π model on the basis of electronic modules of an electronic system to define a heat source, propagation paths and a common base of the electronic system. Observation points in the electronic system are defined, in which each observation point is located at an isothermal surface enclosing a volume surrounding a reference point, and where the reference point is the heat source or one observation point. A heat conduction temperature difference and a heat convection temperature difference are calculated according to a power density function, a thermal conductivity coefficient and a distance vector between the reference point and each observation point. A temperature distribution is established according to the heat conduction and the heat convection temperature difference and a defined temperature of the common base.
On-chip electronic device and method for manufacturing the same
(2015-02-17)
Cheng Yu-Ting
;
Chao Tzu-Yuan
;
Chen Kuan-Ming
;
Hsu Hsin-Fu
The present invention relates to an on-chip electronic device and a method for manufacturing the same. The on-chip electronic device according to the present invention comprises a substrate, a porous layer, a plurality of magnetic bodies, and an electronic member layer. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of magnetic bodies is disposed in the plurality of voids, respectively; and the electronic member layer is disposed on one side of the porous layer, such as upper side of or lower sider of the porous layer. Because the plurality of magnetic bodies is used as the core of the inductance, the inductance is increased effectively and the area of the on-chip electronic device is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
On-chip inductor structure and method for manufacturing the same
(2013-02-12)
Chao Tzu-Yuan
;
Hsu Ming-Chieh
;
Cheng Yu-Ting
;
Chen Chih
;
Lin Chien-Min
The present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.