Browsing by Author "Chiang, Cheng-Hao"

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A TSV-Based Bio-Signal Package With mu-Probe Array
(2014-02-01)
Chou, Lei-Chun
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Lee, Shih-Wei
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Huang, Po-Tsang
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Chang, Chih-Wei
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Chiang, Cheng-Hao
Bio-signal probes providing stable observation with high quality signals are crucial for understanding how the brain works and how the neural signal transmits. Due to the weak and noisy characteristics of bio-signals, the connected interconnect length between the sensor and CMOS has significant impact on the bio-signal quality. In addition, long interconnections with wire bonding technique introduce noises and lead to bulky packaged systems. This letter presents an implantable through-silicon via (TSV) technology to connect sensors and CMOS devices located on the opposite sides of the chip for brain neural sensing applications. With the elimination of traditional wire bonding and packaging technologies, the quality of bio-signal can be greatly improved.
A TSV-Based Heterogeneous Integrated Neural-Signal Recording Device with Microprobe Array
(2014-01-01)
Chou, Lei-Chun
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Lee, Shih-Wei
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Cheng, Chuan-An
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Huang, Po-Tsang
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Chang, Chih-Wei
Highly integrated and miniaturized neural sensing microsystems are crucial for brain function investigation and neural prostheses realization. This paper presents a TSV-based heterogeneous integrated neural-signal recording device with microprobe array. By TSV, microprobe array and CMOS circuit make connection on the opposite sides of the chip. By measurement results on electrical characteristics of devices and TSV, this recording device is ready for bio-medical applications.
Backside-Process-Induced Junction Leakage and Process Improvement of Cu TSV Based on Cu/Sn and BCB Hybrid Bonding
(2013-03-01)
Chang, Yao-Jen
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Ko, Cheng-Ta
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Yu, Tsung-Han
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Chiang, Cheng-Hao
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Chen, Kuan-Neng
Wafer-level 3-D integration using Cu through-silicon vias (TSVs) and fine-pitch Cu/Sn-BCB hybrid bonding is investigated with electrical leakage current. With the well-fabricated Cu TSVs and Cu/Sn bond structures, the leakage current path in this scheme due to backside process was found, and the corresponding mechanism is discussed. The leakage current can be solved by the modified backside process. The improved 3-D integration scheme shows extremely low leakage current and no visible defects inside Cu TSV.
Electrical Investigation and Reliability of 3D Integration Platform using Cu TSVs and Micro-Bumps with Cu/Sn-BCB Hybrid Bonding
(2013)
Chang, Yao-Jen
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Ko, Cheng-Ta
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Hsiao, Zhi-Cheng
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Chiang, Cheng-Hao
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Fu, Huan-Chun
In this paper, the wafer-level three-dimensional (3-D) integration scheme using copper TSVs and fine-pitch Cu/Sn-BCB hybrid bonding is designed, fabricated, and completely investigated on electrical characteristics and stability. Key technologies in this 3D integration scheme include high aspect-ratio Cu TSV, fine-pitch Cu/Sn micro-bumps, 250 degrees C low temperature hybrid bonding, wafer thinning and backside RDL formation. The Kelvin and leakage current structures are designed for realization of fundamental electrical properties, and the daisy chain feature is designed for stability evaluation with several reliability tests. All the samples pass the 1000-cycle thermal cycling test, humidity test, and multiple AC current stressing. This scheme shows a significant leakage current improvement after modifying backside process. The stable reliability results and excellent electrical characteristics indicate that the 3D integration scheme has the excellent sealing ability against oxidation and corrosion, and could be potentially applied for future mass production.
Investigation of ICP Parameters for Smooth TSVs and Following Cu Plating Process in 3D Integration
(2012)
Chiang, Cheng-Hao
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Hu, Yu-Chen
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Chen, Kuo-Hua
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Chiu, Chi-Tsung
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Chuang, Ching-Te
Bosch reactive ion etching is widely used for TSV formation. The micro-masking formed during etching can be successfully removed by adjusting the internal parameters during etching. The smooth high-aspect-ratio TSVs were further developed in wafer-level fabrication. Finally, a two-step etching process was developed to achieve tapered TSVs for the following Cu plating process.
Micro-masking Removal of TSV and Cavity during ICP Etching Using Parameter Control in 3D and MEMS Integrations
(2012)
Hu, Yu-Chen
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Chiang, Cheng-Hao
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Chen, Kuo-Hua
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Chiu, Chi-Tsung
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Chuang, Ching-Te
In this paper, a detailed examination on TSV and cavity inductive coupled plasma (ICP) etching is presented. We investigated the relation such as etching loop number, TSV etching depth and etching rate. Due to particles knocked off from the hard mask and then fallen down to the TSV and cavity bottom, micro-masking issue becomes serious after ICP etching. In addition, parameters of isotropic etching, pressure, and RF bias were studied to investigate the process of micro-masking removal.
Sealing Bump With Bottom-Up Cu TSV Plating Fabrication in 3-D Integration Scheme
(2013-05-01)
Chiang, Cheng-Hao
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Kuo, Li-Min
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Hu, Yu-Chen
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Huang, Wen-Chun
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Ko, Cheng-Ta
A sealing bump approach for the simplification of the conventional bottom-up copper through-silicon via (TSV) plating process flow is developed to reduce the process steps and increase the throughput without sacrificing the structure integrity and electrical performance. In this approach, TSV and bump formation can be achieved simultaneously through the bottom-up plating. Results from the analysis reveal excellent electrical characteristics and quality examination, which indicate that the proposed approach may be a good candidate for the TSV fabrication in 3-D integration.
TSV-Based Quartz Crystal Resonator Using 3D Integration and Si Packaging Technologies
(2013)
Shih, Jian-Yu
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Chen, Yen-Chi
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Chiang, Cheng-Hao
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Chiu, Chih-Hung
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Hu, Yu-Chen
In this paper, one novel packaging approach for crystal resonator with the quartz crystal is demonstrated, developed and characterized. The proposed crystal resonator of the novel package adopts several 3-D core technologies, such as Cu TSVs, thin-film Cu/Sn eutectic bonding, and wafer thinning. A 1210 crystal resonator with quartz blank mount is successfully developed with Cu TSVs that enables the electrical connection of the signal electrode on the quartz blank. The quartz blank is protected by the simultaneous formation of strength reinforcement and excellent sealing capacity of thin-film Cu/Sn eutectic bonding. With the well fabrication and the enhanced structure, excellent leakage results in the MIL-STD-883 hermetic test (8.5*10(-9) similar to 1*10(-8) Pa m(3)/sec by He leak detector) show the crystal resonator using 3D integration has the great performance and manufacturability to replace the conventional metal or ceramic enclosures for the next generation products.