Browsing by Author "Chiang, Chun-Hsien"

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Investigation of Multi-V-th Efficiency for Trigate GeOI p-MOSFETs Using Analytical Solution of 3-D Poisson\'s Equation
(2015-01-01)
Wu, Shu-Hua
;
Yu, Chang-Hung
;
Chiang, Chun-Hsien
;
Su, Pin
;
電子工程學系及電子研究所
This paper provides an analytical subthreshold model for trigate MOSFETs with thin buried oxide (BOX) for multithreshold (multi-V-th) applications. This model shows a fairly good scalability in substrate bias and BOX thickness, which is crucial to the prediction of multi-Vth modulation through BOX. In addition, we demonstrate the application of our model in multi-V-th device design for trigate GeOI p-MOSFETs with the body-effect coefficient (gamma) over a wide range of design space efficiently examined. We have shown an enhanced multi-Vth modulation behavior in trigate GeOI p-MOSFETs. Our study indicates that, for a given subthreshold swing and gamma, the GeOI trigate p-MOSFET can possess a higher fin aspect ratio than the SOI counterpart.