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Browsing by Author "Chiang, Meng-Hsueh"

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    Optimal design of triple-gate devices for high-performance and low-power applications
    (2008-09-01)
    Chiang, Meng-Hsueh
    ;
    Lin, Jeng-Nan
    ;
    Kim, Keunwoo
    ;
    Chuang, Ching-Te
    ;
    電子工程學系及電子研究所
    Pragmatic design of triple-gate (TG) devices is presented by considering corner effects, short-channel effects, and channel-doping profiles. A novel TG MOSFET structure with a polysilicon gate process is proposed using asymmetrical (n(+)/p(+)) polysilicon gates. CMOS-compatible V(T)'s for high-performance circuit applications can be achieved for both nFET and pFET. The superior subthreshold characteristics and device performance are analyzed and validated by 3-D numerical simulations. Comparisons of device characteristics with a midgap metal gate are presented.