Browsing by Author "Chiang, Pei-Yuan"
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Item type:Item, A 10 similar to 18GHz wide-band transfonner feedback LNA(2007) ;Chiang, Pei-Yuan ;Jou, Christina. F. ;Wu, Hui-I ;Huang, Zhe-Yang傳播研究所A wide-band (10 similar to 18GHz) low noise amplifier(LNA) is presented. With transformer feedback in the traditional cascode amplifier, good input matching is achieved from 10 GHz to 18 GHz. The noise figure is below 3.5dB over 10-18GHz. There is no input-matching elements in the input gate of the cascode amplifier, so that the LNA can achieve lower NF. The LNA is designed based on CMOS TSMC 0.18 mu m mixed signal/RF process. With 1.8V supply voltage and three stage amplifiers to achieve wider gain bandwidth, the LNA can achieve input-matching of -12dB over the bandwidth; minimum NIT 2.4dB; gain(S21) of 17dB and 1dB gain compression(P1dB) at -22.6dB. The power consumption is 37.6mW(exclude buffer).Item type:Item, A novel ultra wideband transformer-feedback LNA(2008) ;Wu, Hui I. ;Lin, Tsung-Ting ;Jou, Christina F. ;Lin, Chih-PengChiang, Pei-YuanA 3-10 GHz wide-band low noise amplifier with novel input matching mechanism is presented in this letter. The proposed circuit uses reactive-feedback and transistor's intrinsic gate-drain capacitor as input matching network to achieve a simulated -10dB input reflection coefficient from 3.1 GHz to 10.6 GHz. The fabricated wideband LNA achieves a simulated power gain (S21) of about 10 dB from 3.1 G to 10.6 GHz, and noise figure of 2.72-3.26 dB from 3.1 G to 10.6 GHz. The input 1 dB compression point and input IP3 (IIP3) at 3.1 GHz are about -18.5 and -12 dBm, respectively. The DC supply voltage and power consumption is 1.5V(-) and 15 mA, respectively.Item type:Item, Multi-stage low-noise amplifier with LC-tank load for ultra-wideband wireless receiver(2007) ;Chen, Chun-Chieh ;Huang, Zhe-Yang ;Wang, Yen-Chun ;Chiang, Pei-YuanHuang, Che-ChengA multi-stage low-noise amplifier (LNA) with LC-tank load to extend the bandwidth is designed for ultra-wideband (UWB) wireless receiver. The design consists of three LC-tank cascode amplifier and one output buffer and is implemented in 0.18um RF CMOS process. The LNA gives 14.5dB gain and 7.2GHz 3dB bandwidth (3.1 - 10.3GHz) while consuming 22.8mW through a 1.5V supply. Over the 3.1GHz - 10.3GHz frequency band, a minimum noise figure of 2.6dB and input return loss lower than -8.8dB have been achieved.Item type:Item, Wide-IF-Band CMOS Mixer Design(2010-04-01) ;Chiang, Pei-Yuan ;Su, Chao-Wei ;Luo, Sz-Yun ;Hu, RobertJou, Christina F.A wide-IF-band transistor mixer has been designed using a 0.13-mu m RF-CMOS process where its RF frequency is 8.7-17.4 GHz, local oscillator (LO) fixed at 17.4 GHz, and IF up to 8.7 GHz. Proper layout arrangement for the Marchand balun has been discussed and then implemented; the output amplitude and phase imbalance are less than 0.5 dB and 1 degrees measured in the RF bandwidth. Related theories for the core mixing circuit are explored extensively and verified through simulation; broad bandwidth of the resistive double-balanced mixer is then confirmed in the IF aspect. The designed mixer has more than 10-dB conversion gain, matched RF, IF, and LO ports, and good port isolation over the intended wide bandwidth. The input-referred P1 dB is -17.5 dBm at 9 GHz and -16 dBm at 13 GHz. The third-order input intercept point is -6 dBm at 9 GHz and -5 dBm at 13 GHz. The noise figure is 7 dB at 9 GHz and 12.6 dB at 13 GHz. The power consumption is 40 mW for this 1.3-mm(2) mixer chip.