Browsing by Author "Chien, C. H."

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A Novel Design of P-N Staggered Face-tunneling TFET Targeting for Low Power and Appropriate Performance Applications
(2017-01-01)
Hsieh, E. R.
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Fan, Y. C.
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Chang, K. Y.
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Liu, C. H.
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Chien, C. H.
A novel complementary tunneling FET (C-TFET) has been designed and targeted for the low power and appropriate performance applications (Apps). In this new architecture of C-TFET, the drain and source (D/S) are configured as a staggered structure to increase the tunneling current, and the conventional p-i-n junction C-TFET has been modified as a p-n junction to further enhance the I-on current. The results show that new design can achieve 310uA/um(n), 440uA/um(p) TFETs of I-on, comparable to those of LP planar CMOS devices, 0.1 nA/um of I-off, while excellent S.S.(<10mV/dec) at V-dd= 0.7V, which will be a promising candidate for the low-power and appropriate performance apps in the next decade.
Characterization of inter-poly high-kappa dielectrics for next generation stacked-gate flash memories
(2006)
Chen, Y. Y.
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Li, T. H.
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Kin, K. T.
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Chien, C. H.
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Lou, J. C.
In this paper, the inter-poly dielectric (IPD) thickness, scaling, and reliability characteristics of Al2O3 and HfO2 IPDs are studied, which are then compared with TEOS IPD. Regardless of deposition tools, drastically leakage current reduction and reliability improvements have been demonstrated by replacing TEOS IPD with high-permittivity (high-kappa) IPDs, which are suitable for mass production applications in the future. Moreover, MOCVD deposition can be used to further promote dielectric reliability when compared to reactive-sputtering deposition. By using MOCVD deposition, the QRD can be significantly improved, in addition to reduced leakage current density, enhanced breakdown voltage and effective breakdown field. Our results clearly demonstrate that both MOCVD-Al2O3 and MOCVD-HfO2 IPD possess great potential for next generation stacked-gate flash memories.
Comparing the performances of Pentacene based TFTs use MWCNTs and Pd/Ti as source and drain
(2007)
Chang, C. H.
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Chien, C. H.
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Yang, J. Y.
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
Design of Complementary Tilt-gate TFETs with SiGe/Si and III-V Integrations Feasible for Ultra-low-power Applications
(2015)
Hsieh, E. R.
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Lin, Y. S.
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Zhao, Y. B.
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Liu, C. H.
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Chien, C. H.
A new concept of the structure design with an alignment between the maximum band-to-band tunneling rate and electric field has been proposed to enhance the performance of TFETs. It was found that the specific gate of TFET to form an obtuse shape can dramatically improve the on-current of TFET, with over 4 order improvement in comparison to planar ones. This complementary TFET (CTFET) was also demonstrated by SRAM as a benchmark, with SiGe/Si integrated with III-V on Si substrate. In order to increase WNM and RSNM of CTFET SRAM, a new scheme has been adopted, in which SRAM has been successfully demonstrated with operating bias down to 0.3V.
Dielectric properties of nitric oxide-annealed gate oxides grown on nitrogen-implanted silicon substrates
(2006-08-14)
Chen, Y. Y.
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Chien, C. H.
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Lou, J. C.
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
The characteristics of nitric oxide (NO)-annealed nitrided gate oxides grown on nitrogen-implanted silicon substrates (NIS) were studied in this paper. It was found that nitrogen accumulation occurred near the interface after NO-annealing, while NIS-grown nitrided oxide produced a uniform nitrogen distribution in the dielectric bulk. Moreover, it was found that the dielectric reliability is strongly dependent on the dosages used for NIS preparation. NIS with dosages smaller than 10(14) cm(-2) was found not to suppress the oxidation rate and to degrade the dielectric reliability. On the other hand, the samples with a dosage of 10(15) cm(-2) not only exhibited a significantly reduced oxidation rate, making it suitable for growing oxides of multiple thicknesses in sub-3 nm technologies meeting the Systems on Chip requirement, but also improved the dielectric reliability. NO-annealed NIS-grown nitrided oxides depict superior dielectric reliability and this technique appears to be suitable to replace the traditional SiO2 at 0.13 mu m technology node and beyond. (c) 2006 Elsevier B.V. All rights reserved.
Fabricating a n(+)-Ge contact with ultralow specific contact resistivity by introducing a PtGe alloy as a contact metal
(2015-09-14)
Hsu, C. C.
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Chou, C. H.
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Wang, S. Y.
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Chi, W. C.
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Chien, C. H.
In this study, we developed an Ohmic contact structure to an in situ n(+)-Ge film that has an ultralow specific contact resistivity of [(6.8 +/- 2.1) x 10(-8) Omega.cm(2)]. This structure was developed by introducing a PtGe alloy as the contact metal. We observed that Ohmic contact behavior can be achieved with several other metals, and the contact resistance is related to the work function of the metal. A physical model of the band diagram was created for the Schottky tunneling width, which can provide insight into the validation and explanation of work function-dependent specific contact resistivity. Dopant segregation at the interface and increased interface roughness induced by the formation of the alloy are crucial in further reducing the specific contact resistivity. As a result, a stable PtGe alloy and high doping concentration in Ge are critical in pursuing a lower contact resistance for a Ge n-channel device. (C) 2015 AIP Publishing LLC.
Fabricating a n(+)-Ge contact with ultralow specific contact resistivity by introducing a PtGe alloy as a contact metal (vol 107, 113503, 2015)
(2015-12-07)
Hsu, C. C.
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Chou, C. H.
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Wang, S. Y.
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Chi, W. C.
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Chien, C. H.
Improved field emission properties of thiolated multi-wall carbon nanotubes on a flexible carbon cloth substrate
(2007-10-03)
Chuang, F. T.
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Chen, P. Y.
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Cheng, T. C.
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Chien, C. H.
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Li, B. J.
In this paper we report the observation of enhanced field emission properties from thiolated multi-wall carbon nanotubes ( MWCNTs) produced by a simple and effective two- step chemical surface modification technique. This technique implements carboxylation and thiolation on the MWCNTs synthesized by microwave plasma chemical vapor deposition ( MPCVD) on the flexible carbon cloth substrate. The resulting thiolated MWCNTs were found to have a very low threshold field value of 1.25 V mu m(-1) and a rather high field enhancement factor of 1.93 x 10(4), which are crucial for applications in versatile vacuum microelectronics.
Photovoltaic effect on the conductive atomic force microscopic characterization of thin dielectric films
(2006-09-25)
Chang, M. N.
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Chen, C. Y.
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Yang, M. J.
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Chien, C. H.
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電子工程學系及電子研究所
The authors have used front-wing conductive probes to investigate the photovoltaic effect on the conductive atomic force microscopic (C-AFM) characterization of thin dielectric films. The surface photovoltage induced by the laser beam of an atomic force microscope can enhance the electrical field across the studied dielectric film, decreasing the onset voltage of the leakage current, resulting in a modified C-AFM image with a larger current distribution. Moreover, the experimental results also revealed that the influence of the photovoltaic effect on C-AFM would be more significant for dielectric films that are grown on a substrate with a higher carrier concentration. (c) 2006 American Institute of Physics.
Programming efficiency of stacked-gate flash memories with high-kappa dielectrics
(2006)
Chen, Y. Y.
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Chien, C. H.
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Kin, K. T.
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Lou, J. C.
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電子工程學系及電子研究所
The programming efficiency of high-permittivity (K) inter-poly dielectrics (IPDs) and tunnel dielectrics (TDs) on the stacked-gate flash memory performance is evaluated. By 2D MEDICI simulation, stacked-gate flash memories with high-K IPDs clearly exhibited significant improvement in operation speed over those with conventional oxide/nitride/oxide IPD programmed with either channel Fowler-Nordheim (CFN) or channel hot electron (CHE) injection. Choosing HfO2 as the IPD and using CFN programming scheme, the operating voltage can be reduced by more than 48% under a typical lops programming time. However, the effect of high-kappa TDs was quite different when compared with high-K IPDs. High-kappa TDs were only beneficial for memories programmed with CHE injection instead of CFN tunneling. The operating voltage can be reduced by more than 27% under lops programming time by choosing HfO2 as both the IPD and TD with CHE programming scheme. Due to the contrary improvement in programming schemes, high-kappa IPDs and TDs were suitable for next-generation NAND-and NOR-type stacked-gate flash memories, respectively.
Seeding effect of SrBi2Ta2xO9 thin buffer layer on crystallization and electric properties of SrBi2Ta2O9 thin films
(2007)
Hsu, F. Y.
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Lcu, C. C.
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Chien, C. H.
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Hu, C. T.
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電子工程學系及電子研究所
The seeding effects of the precrystallized (RTP 750 degrees C 30s) thin buffer layer, SrBi2Ta2xO9 (SBT, x=0.9, 1.0, and 1.1), regarding the structure, the morphology and the ferroelectric properties of the SrBi2Ta2O9 ferroelectric thin films on top of buffer layer, have been investigated. X-ray diffraction patterns revealed that the crystallinity of SrBi2Ta2O9 thin films were significant influenced by the buffer layers with various Ta contents. By adding a Ta deficient buffer layer, the preferred polar a-axis orientation and the uniformity of grain size within the SBT thin films were promoted. Meanwhile, the optimized ferroelectric properties were achieved from the SrBi2Ta1.8O9 buffered SrBi2Ta2O9 thin film, with maximum 2Pr values about 19.7 mu C/cm(2), which was almost 93% greater than that of specimen with the stoichiometric buffered one.