Browsing by Author "Chien, Chao Hsin"

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Enhancing Charge Collection in Dye-Sensitized Solar Cells by Trimming Sidewall of the TiO2 Nanotubes
(2012)
Kuo, Yu Yen
;
Lin, Jui Guo
;
Chien, Chao Hsin
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The morphological properties of TiO2 nanotube heavily influence the performance of dye-sensitized solar cell using TiO2 nanotube-array as the photoanode. We report an efficient trimming method of fabricating 18.8 mu m TiO2 nanotube-arrays with sidewall thicknesses ranged from 23 nm to 12 nm. With the photoanode of thin-wall nanotube-array, the photocurrent density of the dye-sensitized solar cell increased from 13.0 mA/cm(2) to 16.2 mA/cm(2) when the thickness of the sidewall was thinned down from 23 nm to 14 nm. Electrical impedance spectroscopy showed a significant difference of internal electrical characteristics between the solar cells with the as-prepared and with thin-wall nanotube-arrays. The thinning of the sidewall of the nanotubes had little influence on the diffusion of the electrons; the improvements in photocurrent density are the result of the more efficient infiltration of electrolyte into wider voids between neighboring thin-wall nanotubes. (C) 2011 The Electrochemical Society. [DOI: 10.1149/2.099202jes] All rights reserved.
Ge Channel MOSFETs Directly on Silicon
(2014)
Chen, Che Wei
;
Chung, Cheng-Ting
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Chien, Chao Hsin
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper presents high performance Ge/Si diode, trigate Ge PFET, junctionless trigate Ge PFET and strained Ge NFET directly on Si wafer. The leakage current of the Ge/Si diode is as low as <10(-7) A/cm(2). Trigate PFET depicts a driving current of 22 mu A/mu m at V-G = -2 V and a low OFF-current of 3 nA/mu m at V-G = 2 V. Junctionless trigate PFET shows I-ON/I-oFF ratio of similar to 6 x 10(4) ( I-D), similar to 6 x10(5) (I-s), and the remarkably low off-current of 450 pA/mu m at V-D = -0.1 V. Strained trigate Ge NFET is demonstrated.
Study of E-Mode AlGaN/GaN MIS-HEMT with La-silicate Gate Insulator for Power Applications
(2020-02-01)
Huang, Kuan Ning
;
Lin, Yueh-Chin
;
Lin, Jia-Ching
;
Hsu, Chia Chieh
;
Lee, Jin Hwa
An enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) with La2O3/SiO2 gate insulator is investigated for high power application. The La2O3/SiO2 composite oxide formed amorphous La-silicate after post deposition annealing. Good oxide film quality and excellent La-silicate/AlGaN interface properties were achieved as evidenced by the capacitance-voltage (C-V) curves and hysteresis effect of the La-silicate on AlGaN/GaN metal-oxide-semiconductor capacitors. As a result, the E-mode AlGaN/GaN MIS-HEMT with La-silicate gate insulator shows good threshold voltage (V-th) stability and demonstrated only slightly increase in the dynamic on-resistance (R-on) after high drain bias stress test. The device also exhibits high current density of 752 mA/mm, high maximum transconductance of 210 mS/mm, low subthreshold swing of 104 mV/decade, and I-ON/I-OFF = 10(7) when tested at V-DS = 10 V. Furthermore, low on-resistance of 7.6 omega mm, high breakdown voltage of 670 V, and excellent delay time of 4.2 ps were achieved, demonstrating the La-silicate MIS-HEMTs have the potential to be used for power electronic applications.