Browsing by Author "Chin, Jing-Yi"

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Characteristics of poly-Si TFT combined with nonvolatile SONOS memory and nanowire channels structure
(2007-12-15)
Chen, Shih-Ching
;
Chang, Ting-Chang
;
Liu, Po-Tsun
;
Wu, Yung-Chun
;
Lin, Po-Shun
In this work, we study a polycrystalline silicon thin-film transistor (poly-Si TFT) combined with a silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire channels structure for the applications of transistor and nonvolatile memory. The proposed device named with NW SONOS-TFT has superior electrical characteristics of transistor and also can exhibit high program/erase (P/E) efficiency under adequate bias operation. The V-th decreases from 2.45 V to 1.76 V and subthreshold swing reduces from 0.57 V/decade to 0.42 V/decade. The programming V-th shift is improved from 2.2 V to 3.3 V at 14 V for 1 s and the erasing V-th shift is improved from -0.3 V to -1.3 V at -14 V for 1 s. The dramatic improvement can be attributed to the tri-gate structure and corner effect. In addition, the memory device has a promising data retention behavior at 85 degrees C and a 0.8 V memory window after 5 x 10(3) P/E cycles operations. Hence, the NW SONOS-TFT is suitable for application in the future system-on-panel display. (C) 2007 Elsevier B.V. All rights reserved.
Nonvolatile Si/SiO2/SiN/SiO2/Si type polycrystalline silicon thin-film-transistor memory with nanowire channels for improvement of erasing characteristics
(2007-11-05)
Chen, Shih-Ching
;
Chang, Ting-Chang
;
Liu, Po-Tsun
;
Wu, Yung-Chun
;
Chin, Jing-Yi
A silicon-oxide-nitride-oxide-silicon type polycrystalline silicon thin-film transistor (poly-Si TFT) with nanowire channels was investigated for both transistor and memory applications. The poly-Si TFT memory device has superior electrical characteristics, such as higher drain current, smaller threshold voltage, and steeper subthreshold slope. Also, the simulation result on electrical field reveals that the electrical field across the tunnel oxide is enhanced and that across the blocking oxide is reduced at the corner regions. This will lead to the parasitic gate injection activity and the erasing speed can be apparently improved in the memory device due to the pronounced corner effect and narrow channel width.
Temperature-dependent memory characteristics of silicon-oxide-nitride-oxide-silicon thin-film-transistors
(2010-05-03)
Chen, Shih-Ching
;
Chang, Ting-Chang
;
Wu, Yung-Chun
;
Chin, Jing-Yi
;
Syu, Yong-En
This study investigates the temperature-dependent memory characteristics of polycrystalline silicon thin-film transistors with oxide/nitride/oxide stack gate dielectrics and N(+) poly-Si gate structures for nonvolatile memory application. As the device was programmed by Fowler-Nordheim tunneling at high temperature, some electrons captured in shallow traps could obtain enough thermal energy to de-trap to the gate, resulting in low programming efficiency. As the programming time increases, the hole injection through the blocking oxide from the gate would further lead the threshold voltage to decrease. In addition, the retention characteristic of the device programmed at higher temperature exhibits better charge storage ability. Because the electrons trapped in the shallow traps of the nitride layer can be easily de-trapped when temperature rises, the memory characteristics are mainly dominated by charges stored in the deep traps. (C) 2009 Elsevier B.V. All rights reserved.