Browsing by Author "Chiou, Jin-Chem"

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Assembly of Micro Mirrors on SOI Wafers Using SU-8 Mechanisms and One-Push Operation
(2008)
Chiu, Yi
;
Huang, Wei-Zhi
;
Wu, Jhong-Wei
;
Chiou, Jin-Chem
;
Shieh, Han-Ping D.
Micro mirrors are assembled on silicon-on-insulator wafers using one-push operation. The proposed technique can reduce the overall complexity of micro system assembly by using automated equipments. Novel SU-8 mechanisms are also demonstrated.
Energy-Efficient Configurable Discrete Wavelet Transform for Neural Sensing Applications
(2014-01-01)
Wang, Tang-Hsuan
;
Huang, Po-Tsang
;
Chen, Kuan-Neng
;
Chiou, Jin-Chem
;
Chen, Kuo-Hua
Highly integrated neural sensing microsystems are crucial to capture accurate signals for brain function investigations. In this paper, an energy-efficient configurable lifting-based discrete wavelet transform (DWT) is proposed for a high-density neural sensing microsystems to extract the features of neural signals by filtering the signals into different frequency bands. Based on the lifting-based DWT algorithm, the area and power consumption can be reduced by decreasing the computation circuits. Additionally, both the time window and mother wavelets can be adjusted via the configurable datapth. Moreover, the power-gating and clock-gating techniques are utilized to further reduce the energy consumption for the energy-limited bio-systems. The proposed configurable DWT is designed and implemented using TSMC 65nm CMOS low power process with total area of 0.11 mm(2) and power consumption of 26 mu W. Moreover, this proposed DWT is also implemented in Lattice MachXO2-1200 FPGA and integrated in a 2.5D heterogeneously integrated high-density neural-sensing microsystem with the power consumption of 211.2 mu W.
Integration structure of semiconductor circuit and microprobe sensing elements and method for fabricating the same
(2009-11-19)
Chiou, Jin-Chem
;
Chang, Chih-Wei
The present invention discloses an integration structure of a semiconductor circuit and microprobe sensing elements and a method for fabricating the same. In the method of the present invention, a semiconductor circuit is fabricated on one surface of a semiconductor substrate, and the other surface of the semiconductor substrate is etched to form a microprobe structure for detect physiological signals. Next, a deposition method is used to sequentially form an electrical isolated layer and an electrical conductive layer on the microprobes. Then, an electrical conductive material is used to electrically connect the electrical conductive layer with the electrical pads of the semiconductor circuit. Thus is achieved the integration of a semiconductor circuit and microprobe sensing elements in an identical semiconductor substrate with the problem of electric electrical isolated being solved simultaneously. Thereby, the voltage level detected by the microprobes will not interfere with the operation of the semiconductor circuit.
Wafer Level Batch Fabrication and Assembly of Small Form Factor Optical Pickup Head
(2008)
Hsiao, Sheng-Yi
;
Lee, Chih-Chun
;
Chiu, Yi
;
Shih, Hsi-Fu
;
Chiou, Jin-Chem
A MEMS batch assembly process for fabricating small form factor optical pickup head is proposed to minimize the complexity of assembly. Electrical and optical components are sealed in a chamber. A silicon optical bench with a packaged laser diode and crystalline-plane mirrors is demonstrated.