Browsing by Author "Chiou, LY"

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A full code-patterns coverage high-speed embedded ROM using dynamic virtual guardian technique
(2006-02-01)
Chang, MF
;
Chiou, LY
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Crosstalk between bitlines induces read failure and limits the coverage of applicable code-patterns for high-speed contact/via-programming read-only memories (ROMs) in SoC. Owing to the variation in bitline loading across code-patterns, the amount of coupled noise on an accessed bitline is code-pattern-dependent. This crosstalk effect worsens, with larger coupling capacitance and smaller intrinsic loading, as the technology node shrinks. This study proposes dynamic virtual guardian (DVG) techniques for contact/via-programming ROM macros and compilers to eliminate the crosstalk-induced read failure and increase the code-patterns coverage. Compared with conventional ROMs, DVG techniques achieve higher speed, lower power consumption and better design for manufacturing (DFM) capability with full code-patterns coverage. Experiments on fabricated designs, a conventional ROM and two 256 Kb DVG ROMs, using 0.18 mu m 1P5M CMOS technology have demonstrated that DVG techniques achieve 100% code-pattern coverage under a small sensing margin.
Code-pattern insensitive embedded ROMs using dynamic bitline shielding technique
(2005-07-21)
Chang, MF
;
Chiou, LY
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A dynamic bitline shielding (DBS) technique is proposed for highspeed via-programming ROMs, to eliminate code-pattem-dependent crosstalk-induced read failure (CIRF) and increase code-pattem coverage. Fabricated 256 Kb conventional and DBS ROMs demonstrated that the DBS technique can eliminate the CIRF and operate with a small sensing margin.
Crosstalk-insensitive via-programming ROMs using content-aware design framework
(2006-06-01)
Chang, MF
;
Chiou, LY
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Various code patterns of a via-programming read only memory (ROM) cause significant fluctuations in coupling noise between, bitlines (BLs). This crosstalk between BLs leads to read failure in high-speed via-programmable ROMs and limits the coverage of applicable code patterns. This work presents a content-aware design framework (CADF) for via-programming ROMs to overcome the crosstalk induced read failure. The CADF ROMs employ a content-aware structure and correspondent code-structure programming algorithm to reduce the amount of coupling noise source while maintaining nonminimal BL load for crosstalk reduction. A 256-Kb conventional ROM and a 256-Kb CADF ROM were fabricated using a 0.25-mu m logic CMOS process. The measured results ascertain that the read induced read failure is suppressed significantly by CADF. The CADF ROM also reduced 86.2% and 94.5% in power consumption and standby current compared to the conventional ROM, respectively.