Browsing by Author "Chiu, Chin-Fong"

Now showing 1 - 7 of 7

A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer
(2007)
Chen, Wei-Zen
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Huang, Shih-Hao
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Wu, Guo-Wei
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Liu, Chuan-Chang
;
Huang, Yang-Tung
This paper presents the design of a 3.125 Gbps monolithic CMOS optical receiver, integrating a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. The optical receiver is capable of delivering 420 mV(PP) to 50 Omega output load after optical to electrical conversion. High speed operation is achieved by utilizing spatial modulated light (SML) detector and adaptive analog equalizer. Implemented in a 0.18 mu m CMOS technology, the total power dissipation is 175 mW. The chip size is 0.7 mm(2).
A Small Area Fully Integrated Spread-Spectrum Clock Generator with High EMI-reduction for SATA-3.0 applications
(2010)
Li, Zhen-Yu
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Chiueh, Herming
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Juang, Ying-Zong
;
Chiu, Chin-Fong
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傳播研究所
In this paper, a small area spread-spectrum clock generator (SSCG) with high EMI reduction for SATA-3.0 is presented. Conventional methods use inductor-capacitance (LC) tank to fulfill the high frequency requirement for SATA-3.0. However, the monolithic inductors always occupy a large area, and required precisely characteristic for different fabrication processes. This research propose a SSCG using a ring voltage-controlled oscillators (Ring-VCO) at 6GHz operating frequency; By using the proposed Ring-VCO, the active area of SSCG is 65% of comparable LC tank implementations, and Ring-VCO is much easier to characterized for any CMOS process. In addition, a multi-stage-noise-shaping (MASH) delta-sigma modulator (Delta Sigma modulator) is used to reduce fractional spurs and quantization error for high EMI reduction. The chip is designed in TSMC 0.18um 1P6M CMOS process with active area of 500umx300um, and the simulation results consumes 60.43mW with 1.8V supply. The peak-to-peak jitter at 6GHz output of non spread-spectrum is 6.16ps, and the EMI reduction is 22.49dB with 5000ppm down spread to 5.97GHz.
An Image Combiner and Acquisition Interface for Space Remote Sensing Applications
(2009)
Chen, Tsan-Jieh
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Chiueh, Herming
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Tsai, Hann-Huei
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Chiu, Chin-Fong
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電子工程學系及電子研究所
high resolution image combination and processing plays an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing circuitries (ICAI) for one-dimensional multi-strip CMOS image sensors. The proposed system take advantage of the satellites' linear moving property to control the expose time of CMOS image sensor and provides the realtime ability to continuous generate 12,000 x N high-resolution image for space remote sensing applications. The ICAI chip contains an image sensor control logics, image combiner, and host interface, one-dimensional pixel is combined to form a two-dimensional image by proposed circuitry. A prototype chip of ICAI was designed and fabricated with TSMC 0.18 mu m CMOS 1 P6M technology. The die size is 2.91 mm by 2.91 mm, and the power consumption is 20 mW operating at 8MHz under a 1.8 V supply voltage.
High Definition Image Pre-Processing System for Multi-Stripe Satellites' Image Sensors
(2012-09-01)
Chen, Tsan-Jieh
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Chiueh, Herming
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Hsieh, Chih-Cheng
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Yin, Chin
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Chang, Wen-Hsu
"High-resolution image sensors play an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing system for one-dimensional multi-strip complementary metal-oxide semiconductor image sensors (CISs.) The proposed system takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11 200 x N high-resolution images for satellites' remote sensing. Using hardware accelerators coupled with versatile microprocessors, the architecture is able to offer processing capability as well as long-term maintainability for space-borne platforms. The details of hardware design to meet real-time requirement are presented. The prototype, which contains four strip CISs and field programmable gate array-based prototyping, was implemented to verify functionality and capability of real-time image acquisition and combination. The implementation results show that it is feasible to integrate the proposed system into a single chip."
Live Demonstration: The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing
(2011)
Chen, Tsan-Jieh
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Weng, Chih-Hui
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Chiueh, Herming
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Hsieh, Chih-Cheng
;
Yeh, Shang-Fu
the live demonstration shows the prototype of image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed final system is discussed in the main paper, which takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation result shows the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.
Optical design for LED illumination in application of implantable retinal prostheses
(2019-01-01)
Huang, Ting-Ming
;
Chen, Fong-Zhi
;
Chiu, Chin-Fong
;
Wu, Chung-Yu
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電子工程學系及電子研究所
For those patients with degenerated photoreceptors such that fail to transfer visual information to other retinal cells in the retinal network, a 16x16 pixel self-powered implantable subretinal device has been developed trying to restore their vision. The device contains sensing pixels that collect environmental signal, and electrodes that serve neurostimulation. A photovoltaic cell was designed aside of the sensing pixels and electrodes for power supplying. IR LED was selected to radiate on the photovoltaic cells for energy input such that proper optical layout shall be designed. Several extraocular optical layouts for IR LED illumination are studied to evaluate the perfect efficiency of each layout. Suitable design is to be selected through the evaluation process. Some experiments are performed to study the feasibility of optical layout. Images of IR LED are taken by a CMOS sensor. Irradiance on the calibrated CMOS sensor is calculated for comparison.
The Prototype of Real-Time Image Pre-Processing System for Satellites' Remote Sensing
(2011)
Chen, Tsan-Jieh
;
Weng, Chih-Hui
;
Chiueh, Herming
;
Hsieh, Chih-Cheng
;
Yeh, Shang-Fu
high resolution image combination and processing plays an important role in today's satellites' remote sensing applications. This paper presents an image recombination and processing system for one-dimensional multi-strip CMOS image sensors (CISs.) The proposed system takes advantage of the satellites' linear moving property to control the exposure time of CIS and provides the real-time ability to generate 11,200 x N high-resolution image for satellites' remote sensing applications. The details of hardware design to meet real-time requirement are given out. The prototype, which contains four strip CISs, is implemented to verify functionality and capability of real-time image acquisition and combination. The implementation results show the proposed system, which demands four times larger throughput than the prototype, is feasible in a chip.