Browsing by Author "Chiu, Fang-Yu"

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Characteristics of the SiN Uniaxial Strained NMOSFET with Channel Fluorine Implantation
(2012)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to further improve the channel hot electron stress (CHES) and constant voltage stress (CVS) reliability of n-channel metal-oxide-semiconductor field-effect-transistor with HfO2/SiON gate stack. Although the improvement of transconductance, drain current and subthreshold swing due to the fluorine passivation is screened out by the effect of uniaxial tensile strain, the result clearly demonstrates that integrating the CFI process in the SiN CESL-strained device can further suppress the CHES- and CVS-induced threshold voltage shift.
Constant voltage stress induced charge trapping and detrapping characteristics of the Si(3)N(4) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor with fluorinated HfO(2)/SiON gate stack
(2011-01-17)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Charge trapping and detrapping characteristics of Si(3)N(4) contact etch stop layer (SiN CESL) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with fluorinated HfO(2)/SiON gate stack have been investigated for the first time. Smaller threshold voltage shift can consequently obtain for the SiN CESL strained nMOSFET with fluorinated HfO(2)/SiON gate stack, primarily due to passivation of oxygen vacancies and dangling bonds by either nitrogen or fluorine atoms. However, the SiN CESL strained nMOSFET with fluorinated gate stack inevitably exhibits less charge detrapping ratio, which means greater part of stress-induced charges would remain in the gate stack after nitrogen or fluorine incorporation, respectively. (c) 2011 American Institute of Physics. [doi:10.1063/1.3541878]
Constant voltage stress induced charge trapping and detrapping characteristics of the Si3N4 uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor with fluorinated HfO2/SiON gate stack
(2011-01-17)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Charge trapping and detrapping characteristics of Si3N4 contact etch stop layer (SiN CESL) uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with fluorinated HfO2/SiON gate stack have been investigated for the first time. Smaller threshold voltage shift can consequently obtain for the SiN CESL strained nMOSFET with fluorinated HfO2/SiON gate stack, primarily due to passivation of oxygen vacancies and dangling bonds by either nitrogen or fluorine atoms. However, the SiN CESL strained nMOSFET with fluorinated gate stack inevitably exhibits less charge detrapping ratio, which means greater part of stress-induced charges would remain in the gate stack after nitrogen or fluorine incorporation, respectively. (c) 2011 American Institute of Physics. [doi:10.1063/1.3541878]
Stress immunity enhancement of the SiN uniaxial strained n-channel metal-oxide-semiconductor field-effect-transistor by channel fluorine implantation
(2012-06-01)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Chiu, Fang-Yu
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to investigate electrical characteristics and stress reliabilities of the n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) with HfL2/SiON gate dielectric. Although fluorine incorporation had been used widely to improve device characteristics, however, nearly identical transconductance, subthreshold swing and drain current of the SIN CESL strained nMOSFET combining the CFI process clearly indicates that stress-induced electron mobility enhancement does not affect by the fluorine incorporation. On the other hand, the SiN CESL strained nMOSFET with fluorine incorporation obviously exhibits superior stress reliabilities due to stronger Si-F/Hf-F bonds formation. The channel hot electron stress and constant voltage stress induced threshold voltage shift can be significantly suppressed larger than 26% and 15%, respectively. The results clearly demonstrate that combining the SiN CESL strained nMOSFET with fluorinated gate dielectric using CFI process becomes a suitable technology to further enhance stress immunity. (C) 2011 Elsevier Ltd. All rights reserved.